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2014-05-08Add support for emulating the MSP430 hardware multiply feature.Nick Clifton2-23/+192
* msp430-sim.c (sim_open): Do not allocate memory over the hardware multiply registers. (get_op): Add support for reads from the hardware multiply registers. (put_op): Add support for writes to the hardware multiply registers. (msp430_step_once): Add support for the RETI instruction used by the CPUX architecture.
2014-04-02Add support for two new moxie sign-extension instructionsAnthony Green2-2/+22
2014-03-19Improve .rsrc section merging with better handling of the alignment adjustmentsNick Clifton1-0/+6
made between merged .rsrc sections. * peXXigen.c (rsrc_align): New function. Attempts to cope with alignment variances when .rsrc sections are merged. (rsrc_process_section): Use rsrc_align. * Makefile.am (default-manifest.o): Use WINDRES_FOR_TARGET. * Makefile.in: Regenerate. * emultempl/default-manifest.rc: Fix typo. * scripttempl/pe.sc (R_RSRC): Fix default-manifest exclusion. (.rsrc): Add SUBALIGN(4). * scripttempl/pep.sc: Likewise.
2014-03-18Convert function declarations to ISO C format. Remove redundant code.Nick Clifton1-99/+60
* wrapper.c: Convert function declarations to ISO C format. (sim_open): Delete code for handling t,d and z command line options.
2014-03-14Add support for instruction level tracing to the ARM simulator.Nick Clifton7-94/+245
* wrapper.c (op_print): New function. (sim_dis_read): New function. (print_insn): New function - disassembles the given instruction. (sim_trace): Note that tracing is now allowed. (sim_create_inferior): Default to emulating v6. Initialise the disassembler machinery. (sim_target_parse_command_line): Add support for -t -d and -z options. (sim_target_display_usage): Note existence of -d and -z options. (sim_open): Parse -t -d and -z options. * armemu.h: Add exports of trace, disas and trace_funcs. Add prototype for print_insn. * armemu.c (ARMul_Emulate26): Add tracing code. Delete unused variables. * thumbemu (handle_v6_thumb_insn): Delete unused variable Rd. Move Rm variable into switch cases. Add tracing code. * armcopro.c (XScale_cp15_init): Add a return value. (XScale_cp13_init): Likewise. (XScale_cp14_init): Likewise. (XScale_cp15_LDC): Delete unused function. (XScale_cp15_STC): Likewise. * maverick.c: Delete comment inside comment. (DSPInit): Delete unused function. (DSPMCR4): Fix compile time warning about missing parenthesis. (DSPMCR5): Likewise. (DSPCDP6): Delete unused variable opcode2.
2014-03-14Prevent writes to R15 via LDR or LDM from changing the ARM/Thumb state in ↵David McQuillan3-3/+23
pre-v5 architectures. PR sim/8388 * armemu.c (WriteR15Load): New function. Determines if the state can be changed upon a write to R15. (LoadMult): Use WriteR15Load. * armemu.h (WRITEDESTB): Use WriteR15Load.
2014-03-12Add myself as the maintainer for the MSP430 sim.Nick Clifton2-0/+5
2014-03-10sim: msp430: start a test frameworkMike Frysinger9-0/+120
The current sim lacks any sort of tests. Start a basic framework and add a simple one to test the add insn.
2014-03-10sim: msp430: set initial PC to ELF entry if availableMike Frysinger2-1/+11
If we want to run a simple ELF, the reset vector isn't set up, so starting at address 0 doesn't make sense. Use the ELF's entry point instead.
2014-03-10sim: msp430: fix build time warningsMike Frysinger2-2/+7
This fix is simple: msp430-sim.c: In function 'maybe_perform_syscall': msp430-sim.c:898:10: warning: format '%d' expects argument of type 'int', but argument 5 has type 'long int' [-Wformat] This one we change to use casts like everyone else does in the code base: msp430-sim.c: In function 'msp430_step_once': msp430-sim.c:985:7: warning: passing argument 3 of 'init_disassemble_info' from incompatible pointer type [enabled by default] include/dis-asm.h:368:13: note: expected 'fprintf_ftype' but argument is of type 'int (*)(struct FILE * __restrict__, const char * __restrict__)'
2014-03-10sim: constify arg to sim_do_commandMike Frysinger30-28/+95
It is rare for people to want to modify the cmd arg. In general, they really shouldn't be, but a few still do. For those who misbehave, dupe the string locally so they can bang on it.
2014-03-05sim: constify prog_nameMike Frysinger35-22/+89
There's no need for the prog_name handed down to the core to be mutable, so add const markings to it and all the related funcs.
2014-03-04sim: convert old style prototypesMike Frysinger26-266/+209
Most of these prototypes have been killed off, but we have a few left in the sim tree. Clean them up so we can enable the -W flag for it.
2014-02-17 Revise signal mapping function in GDB interface for RX sim.Kevin Buettner2-29/+18
sim/rx/gdb-if.c had a function named `rx_signal_to_host'. This function mapped signal numbers used by the BSP to host signal numbers which, at one time a while back, were used by GDB as target signal numbers. This change updates the signal numbers returned to be those names prefixed with "GDB_SIGNAL_" as defined in include/gdb/signals.h. It also changes the name of the function somewhat to better match what the function currently does. I noticed that this function is not static - and there's no reason for it not to be - so I made it static too. * gdb-if.c (rx_signal_to_host): Rename to `rx_signal_to_gdb_signal'. Make static. Update all callers to use new name. Use signal names from include/gdb/signals.h.
2014-02-17sim: delete duplicate SIGINT handlingMike Frysinger10-57/+31
Many of the simulators change the SIGINT handler. E.g., moxie/interp.c: sigsave = signal (SIGINT, interrupt); However, this is unnecessary. remote-sim.h already provides an API for asynchronously stopping a sim; and both gdb and the drivers (run.c and nrun.c at least, I didn't check the others) install a SIGINT handler which calls this method. URL: https://sourceware.org/bugzilla/show_bug.cgi?id=16450 Reported-by: Tom Tromey <tromey@redhat.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2014-02-17sim: ppc: drop $(LIBS) from psim dependencyAaro Koskinen2-3/+7
When cross-compiling GDB for PPC, there's a prerequisite "-lz" for psim that results in a build failure. With such prerequisite, GNU Make will try to search the library from build machine's /usr/lib which is wrong. On 64-bit Linux build machines the compilation will fail because of this. URL: https://sourceware.org/bugzilla/show_bug.cgi?id=12202
2014-01-07remove VA_* macros from simTom Tromey4-5/+11
Remove the obsolete VA_* macros from sim. 2014-01-06 Tom Tromey <tromey@redhat.com> * common/cgen-trace.c: Don't use old VA_* macros. * common/sim-load.c (xprintf): Likewise. * common/sim-trace.c (trace_printf, debug_printf): Likewise.
2014-01-07remove PARAMS from simTom Tromey33-430/+459
This removes the last uses of PARAMS from sim. 2014-01-06 Tom Tromey <tromey@redhat.com> * README-HACKING: Don't use PARAMS. * arm/wrapper.c: Don't use PARAMS. * bfin/sim-main.h: Don't use PARAMS. * common/callback.c: Don't use PARAMS. * common/cgen-trace.c: Don't use PARAMS. * common/run-sim.h: Don't use PARAMS. * common/run.c: Don't use PARAMS. * common/sim-base.h: Don't use PARAMS. * common/sim-load.c: Don't use PARAMS. * common/sim-options.h: Don't use PARAMS. * common/sim-trace.c: Don't use PARAMS. * common/sim-trace.h: Don't use PARAMS. * common/sim-utils.h: Don't use PARAMS. * cr16/cr16_sim.h: Don't use PARAMS. * cr16/gencode.c: Don't use PARAMS. * cr16/interp.c: Don't use PARAMS. * cr16/simops.c: Don't use PARAMS. * d10v/d10v_sim.h: Don't use PARAMS. * d10v/gencode.c: Don't use PARAMS. * d10v/interp.c: Don't use PARAMS. * d10v/simops.c: Don't use PARAMS. * erc32/erc32.c: Don't use PARAMS. * erc32/exec.c: Don't use PARAMS. * erc32/float.c: Don't use PARAMS. * erc32/func.c: Don't use PARAMS. * erc32/sis.c: Don't use PARAMS. * erc32/sis.h: Don't use PARAMS. * mips/interp.c: Don't use PARAMS. * mips/sim-main.h: Don't use PARAMS. * sh/interp.c: Don't use PARAMS. * v850/sim-main.h: Don't use PARAMS. * v850/v850_sim.h: Don't use PARAMS.
2014-01-01Update Copyright year range in all files maintained by GDB.Joel Brobecker546-546/+546
2013-12-07sim: bfin: tests: make run-tests.sh executableMike Frysinger2-0/+4
I meant for this script to be +x, but missed when doing the initial CVS commit. It wasn't possible to fix w/CVS, but it is w/git, so do it. Signed-off-by: Mike Frysinger <vapier@gentoo.org> 2012-12-03 Mike Frysinger <vapier@gentoo.org> * run-tests.sh: Add +x file mode.
2013-12-07strip off +x bits on non-executable/script filesMike Frysinger1-0/+4
These files are source files and have no business being +x. We couldn't easily fix it in CVS (you need login+write access to the raw rcs files), but we can fix this w/git. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-11-252013-11-25 Steve Ellcey <sellcey@mips.com>Steve Ellcey2-1/+5
* igen/Makefile.in (igen): Use BUILD_CFLAGS in link.
2013-11-07sim/ChangeLog: Correct bug number in previous commit.Will Newton1-1/+1
2013-11-07sim/arm: Prevent crash when running sim with no binary.Will Newton2-0/+8
2013-11-07 Will Newton <will.newton@linaro.org> PR gdb/15508 * arm/wrapper.c (sim_create_inferior): Call init before accessing STATE.
2013-11-07sim/arm: Prevent NULL pointer dereference in sim_create_inferior.Will Newton2-4/+14
2013-11-07 Will Newton <will.newton@linaro.org> PR gdb/9195 * arm/wrapper.c (sim_create_inferior): Avoid calling bfd_get_mach with a NULL bfd.
2013-10-15 * Makefile.in (srcsim): New variable.Hans-Peter Nilsson2-1/+7
(version.c): Adjust call to $(srccom)/create-version.sh as per change.
2013-10-15 * create-version.sh: Align parameters to match those ofHans-Peter Nilsson3-6/+19
../../gdb/common/create-version.sh. * Make-common.in (srcsim): New variable. (version.c): Adjust call to create-version.sh as per above.
2013-10-09sim/erc32/ChangeLog:Sergio Durigan Junior2-3/+16
2013-10-09 Sergio Durigan Junior <sergiodj@redhat.com> PR sim/16018: * float.c (set_fsr): Add missing "break" statements. Reindent code.
2013-09-23Regenerate sim configure files to pick up support for powerpc64le inAlan Modra55-137/+9417
libtool.m4.
2013-09-03sim: mark complete_option_list args const to fix build warningsMike Frysinger2-1/+5
The completion API was updated, but this func missed having its text/word args const.
2013-08-08 * gdb-if.c (hw_breakpoints): Remove.Kevin Buettner2-10/+15
(sim_store_register): Add an assert() to make sure PC is in range. Delete code which referenced hw_breakpoints[].
2013-06-28move version.in from gdb/common back to gdbTom Tromey5-3/+14
This reverts part of the earlier version.in change. It moves version.in back to the gdb directory. This works around the CVS bug we've found. gdb * Makefile.in (version.c): Use version.in, not common/version.in. * common/create-version.sh: Likewise. * common/version.in: Move... * version.in: ...here. gdb/doc * Makefile.in (version.subst): Use version.in, not common/version.in. * gdbint.texinfo (Versions and Branches, Releasing GDB): Likewise. gdb/gdbserver * Makefile.in (version.c): Use version.in, not common/version.in. sim/common * Make-common.in (version.c): Use version.in, not common/version.in. * create-version.sh: Likewise. sim/ppc: * Make-common.in (version.c): Use version.in, not common/version.in.
2013-06-28* rx.c (SHIFT_OP): A shift by zero still sets the condition codes.Nick Clifton2-2/+6
2013-06-26 * Makefile.in (dtbdir): Don't use gdb's version.in.Tom Tromey2-1/+5
2013-06-24Adapt sim to new version number & date locations.Joel Brobecker5-11/+51
This change is required now that gdb/version.in has been moved to gdb/common/version.in and now that the date needs to be fetched from bfd/version.h. sim/common/ChangeLog: * create-version.sh: New script. Adapted from gdb/commong/create-version.sh. * Make-common.in (version.c): Update rule dependencies, and re-implement using create-version.sh. sim/ppc/ChangeLog: * Makefile.in (srccom): New variable. (version.c): Update rule dependencies, and re-implement using sim/common/create-version.sh.
2013-06-24sim: bfin: note missing parallel handling of SEARCHMike Frysinger2-0/+18
The SEARCH insn is an oddball when it comes to parallel usage. It places a big limit on what other insns it can run in parallel with, but we don't currently track the amount of state needed to verify this (since no other insn really requires this). Add a note for now in case we get around to it.
2013-06-24sim: bfin: handle invalid HLs encoding in dsp shift insnsMike Frysinger2-5/+16
For many of the 32bit dsp shift related insns, we were just ignoring the HLs field. The hardware does not though and will reject the insn if it's set incorrectly. Update the sim to match.
2013-06-24sim: bfin: run-tests.sh: fix typo in usage exitMike Frysinger2-1/+5
2013-06-24sim: bfin: se_all32bitopcodes: skip debug insns under the simMike Frysinger2-1/+18
Since the sim has a few fake debug insns that the hardware does not, we need to check for those before attempting to run them. Otherwise we'll randomly trigger the sim debug asserts/aborts/halts insns. On the hardware, these are proper invalid insns, and the table catches that.
2013-06-24sim: bfin: speed up all insn testcases slightlyMike Frysinger2-2/+8
The main body of the "all insn" test is executed once per tested insn, and we test millions of insns here. Any shrinkage we can do in this loop will speed things up nicely (since it's multiplied per tested insn). To that end, simplify the end-of-table test into one less insn, and omit the SSYNC when we build for the sim. When we build to run on the hardware, this insn matters, but the sim doesn't have write store buffers in the chip that might get in the way (memory writes are atomic).
2013-06-23sim: bfin: trim trailing whitespaceMike Frysinger2-1/+5
2013-06-21 * msp430: New Directory.Nick Clifton17-0/+8534
* configure.tgt: Add it. * configure: Regenerate. * gennltvals.sh: Add msp430 support. * nltvals.def: Regenerate. * Makefile.in: New. * aclocal.m4: Generate. * config.in: Generate. * configure.ac: New. * configure: Generate. * msp430-sim.c: New. * msp430-sim.h: New. * sim-main.h: New. * trace.c: New. * trace.h: New.
2013-06-19sim: bfin: stricter insn decodingMike Frysinger2-50/+86
We wrote a test case that tries every single 32bit opcode on the hardware and compared it to the sim. There were a bunch of places in the sim where we weren't strict enough (requiring certain parts of the opcode be set) so we were treating a lot of invalid opcodes as valid ones. This sprinkles out a lot additional checks in the dsp32alu class. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-06-17sim: bfin: tweak run-tests for parallel usageMike Frysinger2-6/+34
2013-06-17sim: bfin: add helpful info for generating test tablesMike Frysinger2-0/+23
2013-06-17sim: bfin: drop RET[ENI] setupMike Frysinger2-3/+4
Since these insns run in usermode, there should be no need to setup RET[ENI] to safe values. They won't be dereferenced, and any insn that returns via them are valid only in supervisor mode. Since this is in the main exception code path, saving any insn at all is good as it gets multiplied quickly (as in O(n^2) times). Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-06-17sim: bfin: add flush/HWERR todoMike Frysinger2-0/+8
2013-06-10sim: bfin: only regen linux-fixed-code.h in maintainer modeMike Frysinger2-1/+6
Since many people don't have a Blackfin toolchain available, only try to regenerate the header file when in maintainer mode. This file rarely changes, and when it does, we commit the generated output, so there's almost never a need to run directly on an end system.
2013-06-05sim: use AM_MAINTAINER_MODEMike Frysinger76-337/+1802
I noticed the sim code is using an old implementation of the maintainer logic. I cut it over to the new macro (like gdb has been doing). In practice, it makes no difference currently as nothing in the sim tree uses it, but I have a follow up commit for the Blackfin tree that needs it.
2013-05-15sim: arm: add support for MOVW and MOVT instructionsMike Frysinger4-4/+71
From: Jayant R. Sonar <Jayant.Sonar@kpitcummins.com> This patch adds simulator support for handling the armv7 instructions 'movw (immediate)' and 'movt'. Compiler frequently use these instructions to load the 32bit addresses of global variables, string pointers etc. into the general registers. In absence of support of these instructions: 1. GDB run simulator fails to print even simple "hello world" string on console. 2. Loading of global variable addresses into the registers fail causing arithmetic operation failures. Patch has been regression tested for arm-none-eabi (-march=armv7-a).
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