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2021-04-24sim: dv-cfi: fix printf formatMike Frysinger2-1/+5
Use the existing PRI constants to select the right format rather than assume signed_cell is always %u. Fixes building for riscv64.
2021-04-24sim: options: increase max option countMike Frysinger2-1/+9
As we turn on more modules by default for all ports, the number of options has been increasing. The sim-options module has a limit on the number of options it can support, and if it's exceeded, it likes to go into an infinite loop. Increase the ceiling and add an assert so we abort right away instead of hanging. This will be needed to turn on hw support for v850 as it will then exceed the current limit.
2021-04-23sim: simplify hardware m4 macroMike Frysinger30-89/+78
Every port using this sets the 1st arg to yes and the 2nd arg to "". These are the defaults we probably want anyways in order to unify the codebase, so move them to the macro and only allow ports to declare extra hardware models.
2021-04-22Do not check for sys/time.h or sys/times.hTom Tromey104-455/+206
This updates the sim so that it unconditionally uses sys/time.h. This is in agreement with existing code, and a recent change to BFD. I also think that sys/times.h is never needed by the sim, so this patch removes the check and the one spot that was conditionally including it. sim/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * m4/sim_ac_common.m4 (SIM_AC_COMMON): Don't check for sys/time.h or sys/times.h. sim/aarch64/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure, config.in: Rebuild. sim/arm/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure, config.in: Rebuild. sim/avr/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure, config.in: Rebuild. sim/bfin/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure, config.in: Rebuild. sim/bpf/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure, config.in: Rebuild. sim/common/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * sim-utils.c: Update includes. sim/cr16/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * simops.c: Update includes. * configure, config.in: Rebuild. sim/cris/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * rvdummy.c: Update includes. * dv-rv.c: Update includes. * configure, config.in: Rebuild. sim/d10v/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure, config.in: Rebuild. sim/erc32/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure, config.in: Rebuild. sim/example-synacor/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure, config.in: Rebuild. sim/frv/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure, config.in: Rebuild. sim/ft32/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure, config.in: Rebuild. sim/h8300/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure, config.in: Rebuild. sim/iq2000/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure, config.in: Rebuild. sim/lm32/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure, config.in: Rebuild. sim/m32c/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure, config.in: Rebuild. sim/m32r/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure, config.in: Rebuild. sim/m68hc11/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure, config.in: Rebuild. sim/mcore/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure, config.in: Rebuild. sim/microblaze/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure, config.in: Rebuild. sim/mips/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure, config.in: Rebuild. sim/mn10300/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure, config.in: Rebuild. sim/moxie/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure, config.in: Rebuild. sim/msp430/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure, config.in: Rebuild. sim/or1k/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure, config.in: Rebuild. sim/ppc/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * mon.c: Update includes. * emul_unix.c: Update includes. (do_unix_gettimeofday): Update condition. sim/pru/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure, config.in: Rebuild. sim/riscv/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure, config.in: Rebuild. sim/rl78/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure, config.in: Rebuild. sim/rx/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure, config.in: Rebuild. sim/sh/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * interp.c: Update includes. * configure, config.in: Rebuild. sim/v850/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure, config.in: Rebuild.
2021-04-22Remove LIBS from two sim MakefilesTom Tromey4-4/+8
A couple of sim Makefiles define LIBS, but don't use it. This removes these. sim/m32c/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (LIBS): Remove sim/rx/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (LIBS): Remove.
2021-04-22Remove INCLUDE variable from some sim MakefilesTom Tromey8-9/+16
Some Makefiles in sim define INCLUDE but don't use it. This removes these instances. sim/bfin/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (INCLUDE): Remove. sim/m68hc11/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (INCLUDE): Remove. sim/mn10300/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (INCLUDE): Remove. sim/v850/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (INCLUDE): Remove.
2021-04-22Remove and modernize dependencies in simTom Tromey33-193/+139
Some spots in the sim build used manual dependencies, and some spots did a compilation by hand but did not use the automatic dependency tracking code. This patch fixes these spots. I didn't touch ppc, because it doesn't use the common Makefile code. I also didn't touch objects that are for the build machine, because automatic dependencies don't work for those. sim/arm/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (armemu26.o, armemu32.o): Use COMPILE and POSTCOMPILE. sim/bpf/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (arch.o, cpu.o, sim-if.o, traps.o): Remove. (mloop-le.o, mloop-be.o, decode-le.o, decode-be.o, sim-le.o) (sim-be.o): Use COMPILE and POSTCOMPILE. (SIM_EXTRA_DEPS): Add eng-le.h, eng-be.h. sim/cr16/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (SIM_EXTRA_DEPS): New variable. (simops.o): Remove. sim/cris/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (sim-if.o, dv-cris.o, dv-rv.o, arch.o, traps.o) (devices.o, crisv10f.o, mloopv10f.o, cpuv10.o, decodev10.o) (modelv10.o, crisv32f.o, mloopv32f.o, cpuv32.o, decodev32.o) (modelv32.o): Remove. (SIM_EXTRA_DEPS): Add engv10.h. sim/d10v/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (SIM_EXTRA_DEPS): New variable. (simops.o): Remove. sim/frv/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (arch.o, devices.o, frv.o, traps.o, pipeline.o) (interrupts.o, memory.o, cache.o, options.o, reset.o) (registers.o, profile.o, profile-fr400.o, profile-fr450.o) (profile-fr500.o, profile-fr550.o, sim-if.o, mloop.o, cpu.o) (decode.o, sem.o, model.o): Remove. (SIM_EXTRA_DEPS): Add eng.h. sim/iq2000/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (sim-if.o): Remove. (arch.o): Use COMPILE and POSTCOMPILE. (devices.o, iq2000.o, mloop.o, cpu.o, decode.o, sem.o, model.o): Remove. (SIM_EXTRA_DEPS): Add eng.h. sim/lm32/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (arch.o, traps.o, sim-if.o, lm32.o, mloop.o) (cpu.o, decode.o, sem.o, model.o): Remove. (SIM_EXTRA_DEPS): Add eng.h. sim/m32r/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (sim-if.o, arch.o, traps.o, traps-linux.o) (devices.o, m32r.o, mloop.o, cpu.o, decode.o, sem.o, model.o) (m32rx.o, mloopx.o, cpux.o, decodex.o, semx.o, modelx.o) (m32r2.o, mloop2.o, cpu2.o, decode2.o, sem2.o, model2.o): Remove. (SIM_EXTRA_DEPS): Add eng.h, engx.h, eng2.h. sim/m68hc11/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (interp.o): Remove. sim/mips/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (interp.o, m16run.o, micromipsrun.o, multi-run.o): Remove. (SIM_EXTRA_DEPS): New variable. sim/mn10300/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (interp.o): Remove. (idecode.o op_utils.o semantics.o): Remove. sim/or1k/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (mloop.o, arch.o, cpu.o, decode.o, sem.o) (sem-switch.o, model.o): Remove. sim/rl78/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (err.o, fpu.o, gdb-if.o, load.o, main.o, mem.o) (reg.o, rl78.o): Remove. sim/rx/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (err.o, fpu.o, gdb-if.o, load.o, main.o, mem.o) (misc.o, reg.o, rx.o, syscalls.o, trace.o): Remove. sim/sh/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (SIM_EXTRA_DEPS): New variable. (interp.o): Remove. sim/v850/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (interp.o, simops.o, semantics.o): Remove.
2021-04-22Require GNU makeTom Tromey65-2102/+205
GDB has required GNU make for quite some time, and this patch applies this approach to the sim as well. Requiring GNU make means that automatic dependency tracking can be simple and reliable, and it also makes other refactorings simpler. sim/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * m4/sim_ac_common.m4 (SIM_AC_COMMON): Don't check for make. sim/aarch64/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure: Rebuild. sim/arm/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure: Rebuild. sim/avr/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure: Rebuild. sim/bfin/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure: Rebuild. sim/common/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Make-common.in: Require GNU make. sim/cr16/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure: Rebuild. sim/cris/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure: Rebuild. sim/d10v/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure: Rebuild. sim/erc32/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure: Rebuild. sim/example-synacor/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure: Rebuild. sim/frv/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure: Rebuild. sim/ft32/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure: Rebuild. sim/h8300/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure: Rebuild. sim/iq2000/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure: Rebuild. sim/lm32/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure: Rebuild. sim/m32c/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure: Rebuild. sim/m32r/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure: Rebuild. sim/m68hc11/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure: Rebuild. sim/mcore/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure: Rebuild. sim/microblaze/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure: Rebuild. sim/mips/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure: Rebuild. sim/mn10300/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure: Rebuild. sim/moxie/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure: Rebuild. sim/msp430/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure: Rebuild. sim/or1k/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure: Rebuild. sim/pru/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure: Rebuild. sim/riscv/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure: Rebuild. sim/rl78/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure: Rebuild. sim/rx/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure: Rebuild. sim/sh/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure: Rebuild. sim/v850/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * configure: Rebuild.
2021-04-22Add stamp files for generated files in sim/ppcTom Tromey2-2/+13
This changes the sim/ppc Makefile to use the stamp file idiom for a couple of generated files, avoiding extra rebuilds. sim/ppc/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (stamp-vals, stamp-map): New targets. (targ-vals.h, targ-map.c): Update. (clean): Remove files.
2021-04-22Introduce stamp file for hw-config.hTom Tromey2-2/+11
This adds a stamp file for hw-config.h, to avoid unnecessary rebuilds. It also arranges to remove hw-config.h in "mostlyclean", because the file is created by "make". sim/common/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Make-common.in (stamp-hw): New target. (hw-config.h): Depend on stamp-hw. (mostlyclean): Remove stamp-hw and hw-config.h.
2021-04-22Make mostlyclean an alias for cleanTom Tromey2-2/+7
I found out by accident that "mostlyclean" in a sim subdir removes all the configure artifacts. The usual rule is: * If the maintainer built it, maintainer-clean should remove it; * If configure built it, distclean should remove it; * If make built it, "clean" should remove it; * If there is a handy subset of "clean" that is "easy" to rebuild, "mostlyclean" should remove it; otherwise mostlyclean should be an alias for clean This patch makes mostlyclean an alias for clean. sim/common/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Make-common.in (mostlyclean): Now an alias for clean, not distclean.
2021-04-22Fix sim build failureTom Tromey2-4/+6
On x86-64 Fedora 32, the sim was failing to build. sim_events_schedule was passing a 'dummy' argument to sim_events_schedule_vtracef, which caused an error because the format parameter was NULL. However, removing this dummy argument caused an error because too few arguments were being passed -- catch 22. This patch fixes the build problem by using sim_events_schedule_tracef instead. sim/common/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * sim-events.c (sim_events_schedule): Use sim_events_schedule_tracef.
2021-04-22sim: sprinkle some ATTRIBUTE_PRINTFSimon Marchi4-8/+16
Add some ATTRIBUTE_PRINTF attributes to functions that take a format string, to fix a few -Wformat-nonliteral warnings. Use the ATTRIBUTE_PRINTF macro like we use in GDB, instead of spelling out __attribute__((format...)). Use ATTRIBUTE_NULL_PRINTF at one place, because callers expect to be able to pass NULL. sim/common/ChangeLog: * callback.c (os_printf_filtered, os_vprintf_filtered, os_evprintf_filtered, os_error): Use ATTRIBUTE_PRINTF. * sim-engine.h (sim_engine_abort, sim_engine_vabort): Likewise. * sim-events.h (sim_events_schedule_tracef, sim_events_schedule_vtracef): Use ATTRIBUTE_NULL_PRINTF. Change-Id: Icd206f7b2c325e8b144f72eb129fb2a6b5af2fa3
2021-04-21sim: regen against sim/m4/Mike Frysinger62-305/+429
My scripts weren't updated to use new -I../m4 as the first arg.
2021-04-21sim: use -Werror when probing for supported warning flagsSimon Marchi64-32/+161
When building with clang, we get: error: unknown warning option '-Wmissing-parameter-type' [-Werror,-Wunknown-warning-option] This is because clang only warns by default when encountering an unknown warning option, and the probe for supported warning flags is done without -Werror. All flags are therefore accepted by configure, but then it breaks when actually compiling a source file with -Werror. This is equivalent to this commit in gdb: 3e019bdc20eb81b91ab5bc774386201b874c0bac gdb: Use -Werror when checking for (un)supported warning flags We then see some other compilation errors when building with clang and -Werror, they can be dealt with later.
2021-04-20sim: rl78/rx: drop unnecessary getopt.h probingMike Frysinger10-28/+16
Since getopt.h is provided by libiberty, there's no need to probe for a system version of it. Plus we already assume it exists in other parts of the sim.
2021-04-18sim: switch to AC_CHECK_HEADERS_ONCEMike Frysinger51-1698/+1580
This avoids duplicate tests for headers between common m4, arches, and any other sources that would trigger header tests.
2021-04-18sim: msp430: delete unused getopt.h probeMike Frysinger4-18/+5
This port doesn't include it anywhere, so drop the test.
2021-04-18sim: moxie: switch syscalls to common nltvalsMike Frysinger6-5/+52
Rather than hand duplicate the syscall constants, switch to the common nltvals framework. I made sure the constants have the same values before & after too :).
2021-04-18sim: sh: switch syscalls to common nltvalsMike Frysinger7-59/+77
Rather than hand duplicate the syscall table, switch to the common nltvals framework. We have to tweak the constant names, but we get everything else for free. I made sure the constants have the same values before & after too :).
2021-04-18sim: rx: switch syscalls to common nltvalsMike Frysinger7-62/+59
Rather than hand duplicate the syscall table, switch to the common nltvals framework. We have to tweak the constant names, but we get everything else for free. I made sure the constants have the same values before & after too :).
2021-04-18sim: m32c: switch syscalls to common nltvalsMike Frysinger7-60/+56
Rather than hand duplicate the syscall table, switch to the common nltvals framework. We have to tweak the constant names, but we get everything else for free. I made sure the constants have the same values before & after too :).
2021-04-18sim: iq2000: switch syscalls to common nltvalsMike Frysinger6-30/+56
Rather than hand duplicate the syscall table, switch to the common nltvals framework. We have to tweak the constant names, but we get everything else for free. I made sure the constants have the same values before & after too :).
2021-04-18sim: switch to AC_CHECK_FUNCS_ONCE & merge a littleMike Frysinger66-799/+1675
This avoids duplicate tests for functions between common m4, arches, and any other sources that would trigger func tests. Also manually delete known duplicate function tests between the m4, bfin, and v850 ports.
2021-04-18sim: mn10300: delete unused func & header testsMike Frysinger5-52/+6
These appear to have been blindly copied from the v850 port many years ago as the code has never been used. Just delete it all and be done.
2021-04-18sim: syscall: add getpid supportMike Frysinger6-4/+34
Hoist the Blackfin implementation up to the common one.
2021-04-18sim: d10v: fix build warningsMike Frysinger4-5/+17
The printf fix uses our PRIxTA for our sim address type. Then cast away the const (since the underlying code safely treats it as such) even if it's ugly. Finally touch up the argv iterator pointer to match the new func arg. With this tidied up, we can delete the SIM_AC_OPTION_WARNINGS(no) call to get the default common behavior where -Werror is enabled.
2021-04-18sim: cr16: fix build warningsMike Frysinger4-4/+14
The printf fix is obvious enough, but the hash one is a real bug: cr16/interp.c: In function 'sim_open': cr16/interp.c:560:17: error: 'h' may be used uninitialized in this function [-Werror=maybe-uninitialized] 560 | h = h->next; | ~~^~~~~~~~~ It happens to not cause a problem currently because the first entry in the generated table that this loop operates matches a codepath where h is initialized. Then when later entries don't match, the previous value is pointing at the end of a valid hash table already, and the rest of the code does nothing. With this tidied up, we can delete the SIM_AC_OPTION_WARNINGS(no) call to get the default common behavior where -Werror is enabled.
2021-04-15sim erc32: Add include path for readline.John Baldwin4-3/+21
Add a READLINE_CFLAGS variable which adds the include path to the in-tree readline when using the in-tree readline library. sim/erc32/ChangeLog: * Makefile.in (READLINE_SRC, READLINE_CFLAGS): Add. (SIM_EXTRA_CFLAGS): Add READLINE_CFLAGS. * configure: Rebuild. * configure.ac (READLINE_CFLAGS): Add.
2021-04-15sim mn10300: Fix igen generation.John Baldwin3-2/+9
Only pass the top-level instruction decode table (mn10300.igen) to igen via -i. The additional files passed previously caused igen to exit its getopt loop in main and exit silently without generating any output. In addition, when am33-2.igen was added, it was not included from mn10300.igen, so was never used. sim/mn10300/ChangeLog: * Makefile.in: (tmp-igen) Only pass mn10300.igen to igen. * mn10300.igen: Include am33-2.igen.
2021-04-15sim lm32: Use a known-good shell with genmloop.sh.John Baldwin2-1/+5
Explicitly use a known-good shell found by autoconf for executing additional scripts in genmloop.sh rather than the building user's shell. sim/lm32/ChangeLog: * Makefile.in: Pass -shell to genmloop.sh.
2021-04-15sim frv: Add a missing return value for frvbf_check_acc_range.John Baldwin2-1/+5
Claim that the accumulator indices are out of range without raising an exception if the CPU doesn't support media instructions. sim/frv/ChangeLog: * traps.c (frvbf_check_acc_range): Add missing return value.
2021-04-15sim: Add SIM_EXTRA_CFLAGS after CSEARCH.John Baldwin2-4/+9
The bfin sim adds include paths for the SDL libraries. These include paths might include headers for different version of binutils. Move SIM_EXTRA_CFLAGS after CSEARCH to ensure local includes are always preferred to external includes. sim/common/ChangeLog: * Make-common.in (CONFIG_CFLAGS): Remove SIM_EXTRA_CFLAGS. (ALL_CLAGS, COMMON_DEP_CFLAGS): Add SIM_EXTRA_CFLAGS after CSEARCH.
2021-04-12sim: cgen: move cgen_cpu_max_extra_bytes logic into the common codeMike Frysinger57-35/+156
Every arch handles this the same way, so move it to the common code. This will also make unifying the sim_cpu structure easier.
2021-04-09Add missing ChangeLog entry for sim/rx change.Luis Machado1-0/+4
2021-04-09[sim,rx] Silence warning that turns into a build errorLuis Machado1-1/+1
On a 32-bit build, I ran into the following: sim/rx/fpu.c:789:6: error: "*((void *)&a+8)" may be used uninitialized in this function [-Werror=maybe-uninitialized] rv = fp_implode (&a); To silence this, just initialize the struct with 0's. sim/rx/ChangeLog: 2021-04-09 Luis Machado <luis.machado@linaro.org> * fpu.c (rxfp_itof): Initialize structure.
2021-04-08Avoid sequence point warning in h8300 simTom Tromey2-1/+6
GCC gives a -Wsequence-point warning for this code in the h8300 sim. The bug is that memory_size is both assigned and used in the same expression. The fix is to assign after the print. sim/h8300/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * compile.c (init_pointers): Fix sequence point warning.
2021-04-08Add system includes in simTom Tromey20-0/+48
This updates various parts of the sim to include missing system headers. I made the includes unconditional, because other parts of the tree are already doing this. 2021-04-08 Tom Tromey <tom@tromey.com> * traps.c: Include stdlib.h. * cris-tmpl.c: Include stdlib.h. sim/erc32/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * func.c: Include sys/time.h. sim/frv/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * traps.c: Include stdlib.h. * registers.c: Include stdlib.h. * profile.c: Include stdlib.h. * memory.c: Include stdlib.h. * interrupts.c: Include stdlib.h. * frv.c: Include stdlib.h. * cache.c: Include stdlib.h. sim/iq2000/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * iq2000.c: Include stdlib.h. sim/m32r/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * traps.c: Include stdlib.h. * m32r.c: Include stdlib.h. sim/ppc/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * emul_unix.c: Include time.h.
2021-04-08Do not use old-style definitions in simTom Tromey23-298/+191
This changes all the non-generated (hand-written) code in sim to use "new" (post-K&R) style function definitions. 2021-04-08 Tom Tromey <tom@tromey.com> * bpf.c (bpf_def_model_init): Use new-style declaration. sim/common/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * cgen-utils.c (RORQI, ROLQI, RORHI, ROLHI, RORSI, ROLSI): Use new-style declaration. sim/erc32/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * sis.c (run_sim, main): Use new-style declaration. * interf.c (run_sim, sim_open, sim_close, sim_load) (sim_create_inferior, sim_store_register, sim_fetch_register) (sim_info, sim_stop_reason, flush_windows, sim_do_command): Use new-style declaration. * help.c (usage, gen_help): Use new-style declaration. * func.c (batch, set_regi, set_rega, disp_reg, limcalc) (reset_stat, show_stat, init_bpt, int_handler, init_signals) (disp_fpu, disp_regs, disp_ctrl, disp_mem, dis_mem, event) (init_event, set_int, advance_time, now, wait_for_irq, check_bpt) (reset_all, sys_reset, sys_halt): Use new-style declaration. * float.c (get_accex, clear_accex, set_fsr): Use new-style declaration. * exec.c (sub_cc, add_cc, log_cc, dispatch_instruction, fpexec) (chk_asi, execute_trap, check_interrupts, init_regs): Use new-style declaration. * erc32.c (init_sim, reset, decode_ersr, mecparerror) (error_mode, decode_memcfg, decode_wcr, decode_mcr, sim_halt) (close_port, exit_sim, mec_reset, mec_intack, chk_irq, mec_irq) (set_sfsr, mec_read, mec_write, init_stdio, restore_stdio) (port_init, read_uart, write_uart, flush_uart, uarta_tx) (uartb_tx, uart_rx, uart_intr, uart_irq_start, wdog_intr) (wdog_start, rtc_intr, rtc_start, rtc_counter_read) (rtc_scaler_set, rtc_reload_set, gpt_intr, gpt_start) (gpt_counter_read, gpt_scaler_set, gpt_reload_set, timer_ctrl) (memory_read, memory_write, get_mem_ptr, sis_memory_write) (sis_memory_read): Use new-style declaration. sim/frv/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * sim-if.c (sim_open, frv_sim_close, sim_create_inferior): Use new-style declaration. sim/h8300/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * compile.c (cmdline_location): Use new-style declaration. sim/iq2000/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * sim-if.c (sim_open, sim_create_inferior): Use new-style declaration. * iq2000.c (fetch_str): Use new-style declaration. sim/lm32/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * sim-if.c (sim_open, sim_create_inferior): Use new-style declaration. sim/m32r/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * sim-if.c (sim_open, sim_create_inferior): Use new-style declaration.
2021-04-08Fix DTB generation mechanism and build failureLuis Machado3-3/+19
I ran into a build failure with --enable-targets=all due to the fact that the moxie sim expects to be able to use the dtc tool. If it isn't available, the builds fails. The following patch adds a prebuilt dtb file to the tree. That file is the one that is used for installations. The patch also enables (re-)generation of the dtb file through maintainer mode, if it needs to be updated due to a change in the dts file. Tested on aarch64-linux/x86_64-linux. sim/moxie/ChangeLog: 2021-04-08 Luis Machado <luis.machado@linaro.org> * Makefile.in (moxie-gdb.dtb): Add maintainer mode dependency. (install-dtb): Install prebuilt dtb file. * moxie-gdb.dtb: New prebuilt file.
2021-04-08sim: set ASAN_OPTIONS=detect_leaks=0 when running igen and opc2cSimon Marchi11-16/+52
The igen/dgen and opc2c tools leak their heap-allocated memory (on purpose) at program exit, which makes AddressSanitizer fail the tool execution. This breaks the build, as it makes the tool return a non-zero exit code. Fix that by disabling leak detection through the setting of that environment variable. I also changed the opc2c rules for m32c to go through a temporary file. What happened is that the failing opc2c would produce an incomplete file (probably because ASan exits the process before stdout is flushed). This meant that further make attempts didn't try to re-create the file, as it already existed. A "clean" was therefore necessary. This can also happen in regular builds if the user interrupts the build (^C) in the middle of the opc2c execution and tries to resume it. Going to a temporary file avoids this issue. sim/m32c/ChangeLog: * Makefile.in: Set ASAN_OPTIONS when running opc2c. sim/mips/ChangeLog: * Makefile.in: Set ASAN_OPTIONS when running igen. sim/mn10300/ChangeLog: * Makefile.in: Set ASAN_OPTIONS when running igen. sim/ppc/ChangeLog: * Makefile.in: Set ASAN_OPTIONS when running igen. sim/v850/ChangeLog: * Makefile.in: Set ASAN_OPTIONS when running igen. Change-Id: I00f21d4dc1aff0ef73471925d41ce7c23e83e082
2021-04-08sim: testsuite: support exit 77 for unsupported testsMike Frysinger2-1/+8
Exit status 77 is common (including the autotools world) to indicate "skip this test". Add support for mapping that to "unsupported" as that's the closest in the dejagnu world.
2021-04-08sim: testsuite: skip tests when the port is disabledMike Frysinger2-0/+10
If the port hasn't been enabled, don't try to run its tests. Making this dynamic simplifies the test harnesses and avoids duplicating a bunch of target tuple checks.
2021-04-08sim: testsuite: calculate $arch from $subdirMike Frysinger72-180/+142
Since we require ports to use a matching subdir name in the testsuite tree, we can use that to calculate the $arch value.
2021-04-07Aarch64 sim fix for gcc-10 miscompilation.Jim Wilson2-2/+8
This fixes a problem that occurs when compiled by gcc-10, as the code is relying on undefined overflow behavior. This is fixed by replacing compares between 32-bit and 64-bit results with compares that just use the 64-bit results with a cast. PR sim/27483 * simulator.c (set_flags_for_add32): Compare uresult against itself. Compare sresult against itself.
2021-04-07sim: m32c: opc2c: remove unused vlist variableSimon Marchi2-3/+4
When building with AddressSanitizer, sim/m32c fails with: ./opc2c -l r8c.out /home/simark/src/binutils-gdb/sim/m32c/r8c.opc > r8c.c sim_log: r8c.out ================================================================= ==3919390==ERROR: LeakSanitizer: detected memory leaks Direct leak of 4 byte(s) in 1 object(s) allocated from: #0 0x7ffff7677459 in __interceptor_malloc /build/gcc/src/gcc/libsanitizer/asan/asan_malloc_linux.cpp:145 #1 0x55555555b3df in main /home/simark/src/binutils-gdb/sim/m32c/opc2c.c:658 #2 0x7ffff741fb24 in __libc_start_main (/usr/lib/libc.so.6+0x27b24) Fix the leak in main by removing the vlist variable, which seems unused.
2021-04-05Adjust location of readline in sim/erc32Tom Tromey3-2/+7
sim/erc32 uses an obsolete path to the in-tree build of readline. readline was moved into a subdirectory some time ago. This patch fixes the problem. Tested by rebuilding. sim/erc32/ChangeLog 2021-04-05 Tom Tromey <tromey@adacore.com> * configure: Rebuild. * configure.ac (READLINE): Adjust in-tree value.
2021-04-04sim: mips: Add handlers to simulator monitor for unlink, lseek and statFaraz Shahbazker2-1/+75
sim/mips/ChangeLog * interp.c (sim_monitor): Add switch entries for unlink (13), lseek (14), and stat (15). Derived from patch authored by Steve Ellcey <sellcey@mips.com>
2021-04-03sim: example-synacor: a simple implementation for referenceMike Frysinger34-1/+16037
Provide a simple example simulator for people porting to new targets to use as a reference. This one has the advantage of being used by people and having a fun program available for it. It doesn't require a special target -- the example simulators can be built for any existing port.
2021-04-03sim: testsuite: integrate common tests into buildMike Frysinger7-71/+662
Now that we have the common automake build with support for build-time programs working, we can integrate the common tests into the default `make check` flow.
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