Age | Commit message (Collapse) | Author | Files | Lines |
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* ppc-spr-table: Add SDA and PIR.
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* sim-main.h (float_operation): Move enum declaration outside
of _sim_cpu struct declaration.
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* Makefile.in (armemu32.o): Replace $< with autoconf recommended
$(srcdir)/....
(armemu26.o): Ditto.
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* arch.c: Regenerate.
* arch.h: Regenerate.
* cpu.c: Regenerate.
* cpu.h: Regenerate.
* cpuall.h: Regenerate.
* cpux.c: Regenerate.
* cpux.h: Regenerate.
* decode.c: Regenerate.
* decode.h: Regenerate.
* decodex.c: Regenerate.
* decodex.h: Regenerate.
* model.c: Regenerate.
* modelx.c: Regenerate.
* sem-switch.c: Regenerate.
* sem.c: Regenerate.
* semx-switch.c: Regenerate.
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* arch.c: Regenerate.
* arch.h: Regenerate.
* cpu.c: Regenerate.
* cpu.h: Regenerate.
* cpuall.h: Regenerate.
* decode.c: Regenerate.
* decode.h: Regenerate.
* model.c: Regenerate.
* sem-switch.c: Regenerate.
* sem.c: Regenerate.
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* hw_htab.c (htab_map_binary): Don't try to map the text section
when it is empty.
* emul_chirp.c (map_over_chirp_note): Default load-base to -1 not
CHIRP_LOAD_BASE.
(emul_chirp_create): Map in the interrupt table.
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Fix formatting.
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memory. This was labeled as a hack to set r0/r1 with argc/argv.
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* lib/sim-defs.exp (run_sim_test): Include a description such as
"assembling" or "linking" that identifies the phase a test fails
in, for easier analysis of failures.
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address.
(m68hc11eepr_port_event): Fix detach/attach logic.
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* interp.c (sim_resume): New function from sim-resume.c, install
the stepping event after having processed the pending ticks.
(has_stepped): Likewise.
(sim_info): Produce an output only if verbose or STATE_VERBOSE_P.
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* Make-common.in (srccgen): Remove.
(CGEN_CPU_DIR): Define.
(CGEN_READ_SCM): Redefine without $(srccgen).
(CGEN_ARCH_SCM): Ditto.
(CGEN_CPU_SCM): Ditto.
(CGEN_DECODE_SCM): Ditto.
(CGEN_DESC_SCM): Ditto.
* $arch/Makefile.in: Use $(CGEN_CPU_DIR) where applicable.
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pending interrupts.
* interrupts.c (interrupts_process): Keep track of the last number
of masked insn cycles.
(interrupts_initialize): Clear last number of masked insn cycles.
(interrupts_info): Report them.
(interrupts_update_pending): Compute clear and set masks of
interrupts and clear the interrupt bits before setting them
(due to SCI interrupt sharing).
* interrupts.h (struct interrupts): New members last_mask_cycles
and xirq_last_mask_cycles.
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addressing modes.
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Depend on targ-vals.h.
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2001-04-25 Frank Ch. Eigler <fche@redhat.com>
* sim-load.c (sim_load_file): Put it back [...]
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2001-04-19 Frank Ch. Eigler <fche@redhat.com>
* sim-utils.c (sim_analyze_program): Call bfd_cache_close after
we're finished with its immediate use.
* sim-load.c (sim_load_file): Ditto.
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2001-04-18 matthew green <mrg@redhat.com>
* armcopro.c (write_cp15_reg): Set CHANGEMODE if endianness changes.
(read_cp15_reg): Make non-static.
(XScale_cp15_LDC): Update for write_cp15_reg() change.
(XScale_cp15_MCR): Likewise.
(XScale_cp15_write_reg): Likewise.
(XScale_check_memacc): New function. Check for breakpoints being
activated by memory accesses. Does not support the Branch Target
Buffer.
(XScale_set_fsr_far): New function. Set FSR and FAR for XScale.
(XScale_debug_moe): New function. Set the debug Method Of Entry,
if configured.
(write_cp14_reg): Reset count counter if requested.
* armdefs.h (struct ARMul_State): New members `LastTime' and
`CP14R0_CCD' used for the timer/counters.
(ARMul_CP13_R0_FIQ, ARMul_CP13_R0_IRQ, ARMul_CP13_R8_PMUS,
ARMul_CP14_R0_ENABLE, ARMul_CP14_R0_CLKRST, ARMul_CP14_R0_CCD,
ARMul_CP14_R0_INTEN0, ARMul_CP14_R0_INTEN1, ARMul_CP14_R0_INTEN2,
ARMul_CP14_R0_FLAG0, ARMul_CP14_R0_FLAG1, ARMul_CP14_R0_FLAG2,
ARMul_CP14_R10_MOE_IB, ARMul_CP14_R10_MOE_DB, ARMul_CP14_R10_MOE_BT,
ARMul_CP15_R1_ENDIAN, ARMul_CP15_R1_ALIGN, ARMul_CP15_R5_X,
ARMul_CP15_R5_ST_ALIGN, ARMul_CP15_R5_IMPRE, ARMul_CP15_R5_MMU_EXCPT,
ARMul_CP15_DBCON_M, ARMul_CP15_DBCON_E1, ARMul_CP15_DBCON_E0): New
defines for XScale registers.
(XScale_check_memacc, XScale_set_fsr_far, XScale_debug_moe): Prototype.
(ARMul_Emulate32, ARMul_Emulate26): Clean up function definition.
(ARMul_Emulate32): Handle the clock counter and hardware instruction
breakpoints. Call XScale_set_fsr_far() for software breakpoints and
software interrupts.
(LoadMult): Call XScale_set_fsr_far() for data aborts.
(LoadSMult): Likewise.
(StoreMult): Likewise.
(StoreSMult): Likewise.
* armemu.h (write_cp15_reg): Update prototype.
* arminit.c (ARMul_NewState): Initialise CP14R0_CCD and LastTime.
(ARMul_Abort): If XScale, check for FIQ and IRQ being enabled in CP13
register 0.
* armvirt.c (GetWord): Call XScale_check_memacc().
(PutWord): Likewise.
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PENDING_FILL. Use PENDING_SCHED directly to handle the pending
set of the FCSR.
* sim-main.h (COCIDX): Remove definition; this isn't supported by
PENDING_FILL, and you can get the intended effect gracefully by
calling PENDING_SCHED directly.
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2001-03-16 Frank Ch. Eigler <fche@redhat.com>
Add support for mmap-based memory regions.
* sim-memopt.c (mmap_next_fd): New global.
(sim_memory_init): Reinitialize it.
(OPTION_MEMORY_MAPFILE, memory_option_handler): Support new
"--memory-mapfile FILE" option. Check for some errors.
(do_memopt_add): Conditionally do mmap instead of malloc for
backing store of simulated memory. Check for more errors.
(do_simopt_delete, sim_memory_uninstall): Corresponding cleanup.
* sim-memopt.h (munmap_length): New member of _sim_memopt.
* configure.in: Look for mmap/fstat related functions and headers.
* config.in, configure: Regenerated.
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2001-03-15 Frank Ch. Eigler <fche@redhat.com>
* sim-core.c (sim_core_map_attach): Correct overlap-related
error messages.
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SYS_* interfaces.
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arch.c: Regenerate.
arch.h: Regenerate.
cpu.c: Regenerate.
cpu.h: Regenerate.
cpuall.h: Regenerate.
cpux.c: Regenerate.
cpux.h: Regenerate.
decode.c: Regenerate.
decode.h: Regenerate.
decodex.c: Regenerate.
decodex.h: Regenerate.
model.c: Regenerate.
modelx.c: Regenerate.
sem-switch.c: Regenerate.
sem.c: Regenerate.
semx-switch.c: Regenerate.
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* arch.c: Regenerate.
* arch.h: Regenerate.
* cpu.c: Regenerate.
* cpu.h: Regenerate.
* cpuall.h: Regenerate.
* decode.c: Regenerate.
* decode.h: Regenerate.
* model.c: Regenerate.
* sem-switch.c: Regenerate.
* sem.c: Regenerate.
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calls or SWI emulaiton routines. (Alignment checking code has not yet been
contributed).
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* sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
already defined elsewhere.
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* sim-trace.h (TRACE_VPU_IDX): Add.
(TRACE_vpu): Define.
(WITH_TRACE_VPU_P): Likewise.
(TRACE_VPU_P): Likewise.
* sim-trace.c (OPTION_TRACE_VPU): Define.
(trace_options): Add --trace-vpu.
(trace_option_handler): Handle OPTION_TRACE_VPU.
(trace_option_handler): Include VPU tracing in --trace-semantics.
(trace_idx_to_str): Handle TRACE_VPU_IDX.
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* sim-trace.h (TRACE_BRANCH_INPUT1): New macro.
(TRACE_BRANCH_INPUT2): Likewise.
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* sim-main.h (sim_monitor): Return an int.
* interp.c (sim_monitor): Add return values.
(signal_exception): Handle error conditions from sim_monitor.
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* MAINTAINERS: Add myself for common portions.
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2001-02-09 Ben Elliston <bje@redhat.com>
* (profile_print_pc): Write header out in target byte order.
2001-02-09 Ben Elliston <bje@redhat.com>
* sim-profile.c (profile_pc_init): Correct bug in loop logic when
adjusting the pc shift value.
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abort is signalled after processing a breakpoint.
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