aboutsummaryrefslogtreecommitdiff
path: root/sim
AgeCommit message (Expand)AuthorFilesLines
2000-08-22Forgot to check this in with last commit!Dave Brolley1-0/+15
2000-08-21* Contribute CGEN simulator build support code.Frank Ch. Eigler9-4/+325
2000-08-152000-08-15 Dave Brolley <brolley@redhat.com>Dave Brolley1-2/+2
2000-08-152000-08-15 Dave Brolley <brolley@redhat.com>Dave Brolley2-6/+103
2000-08-15Compute write back value for post increment loads beforeNick Clifton2-34/+47
2000-08-11Use address mapping levels for 68hc11 simulator (kill overlap hack)Stephane Carrez9-39/+67
2000-08-112000-08-10 Kazu Hirata <kazu@hxi.com>Kazu Hirata2-8/+10
2000-08-11Eliminate use of MIN().Andrew Cagney2-2/+7
2000-08-09* am33.igen: Warning clean-up.Alexandre Oliva2-42/+24
2000-07-27* Usability improvementFrank Ch. Eigler2-1/+6
2000-07-27Don't clean *.igen.Andrew Cagney2-1/+6
2000-07-272000-06-23 Doug Evans <dje@casey.transmeta.com>Andrew Cagney2-8/+10
2000-07-272000-06-25 Stephane Carrez <Stephane.Carrez@worldnet.fr>Andrew Cagney3-2/+9
2000-07-272000-06-25 Stephane Carrez <Stephane.Carrez@worldnet.fr>Andrew Cagney5-0/+39
2000-07-272000-06-25 Stephane Carrez <Stephane.Carrez@worldnet.fr>Andrew Cagney2-1/+17
2000-07-27Add m68hc11 configry.Andrew Cagney5-0/+4366
2000-07-27New simulator.Andrew Cagney16-0/+7449
2000-07-27From 2000-06-25 Stephane Carrez <Stephane.Carrez@worldnet.fr>:Andrew Cagney4-2/+126
2000-07-27* compile.c (decode): Distinguish inc/dec.[wl] and adds/subsAndrew Cagney2-1/+11
2000-07-20* m16.igen (break): Call SignalException not sim_engine_halt.Andrew Cagney2-1/+5
2000-07-142000-07-14 Fernando Nasser <fnasser@cygnus.com>Fernando Nasser2-1/+5
2000-07-142000-07-14 Fernando Nasser <fnasser@cygnus.com>Fernando Nasser2-0/+9
2000-07-05Change minimum loop size limit to 0x10 (103792)Nick Clifton2-1/+5
2000-07-04* armvirt.c (ABORTS): Do not define.Alexandre Oliva2-1/+3
2000-07-04* armdefs.h (struct ARMul_State): Add is_StrongARM.Alexandre Oliva5-11/+59
2000-07-04* armemu.c (ARMul_Emulate, t_undefined): Proceed to next insn.Alexandre Oliva2-1/+3
2000-07-04* armemu.h (INSN_SIZE): New macro.Alexandre Oliva4-45/+48
2000-07-04* armemu.c (LoadSMult): Use WriteR15() to discard the leastAlexandre Oliva2-2/+5
2000-07-04* armemu.h (WRITEDESTB): New macro.Alexandre Oliva3-37/+48
2000-07-04* armemu.h (GETSPSR): Call ARMul_GetSPSR().Alexandre Oliva3-4/+18
2000-07-04* armemu.h (PSR_FBITS, PSR_SBITS, PSR_XBITS, PSR_CBITS): New.Alexandre Oliva4-30/+40
2000-07-04* armemu.c (ARMul_Emulate): Compute writeback value beforeAlexandre Oliva2-8/+20
2000-07-04* armdefs.h (SYSTEMBANK): Define as USERBANK.Alexandre Oliva3-8/+6
2000-07-04TIc80 simulator.Andrew Cagney18-1/+8613
2000-07-04Fix MOVN.fmt and MOVZ.fmt, need to test GPR[RT].Andrew Cagney2-14/+14
2000-06-24* verbosity reductionFrank Ch. Eigler2-2/+5
2000-06-24* build cleanliness fixFrank Ch. Eigler2-1/+6
2000-06-23Fix printf arguments.Andrew Cagney2-3/+8
2000-06-22* armemu.c (Multiply64): Fix computation of flag N.Alexandre Oliva2-4/+5
2000-06-22* armemu.c (MultiplyAdd64): Fix computation of flag N.Alexandre Oliva2-4/+7
2000-06-20* build fixFrank Ch. Eigler2-21/+11
2000-06-20* armemu.h (NEGBRANCH): Do not overwrite the two most significantAlexandre Oliva2-1/+6
2000-06-19Add strongarm testsNick Clifton2-1/+10
2000-06-13* "Dont" -> "Don't"Frank Ch. Eigler3-2/+6
2000-06-132000-06-13 Kazu Hirata <kazu@hxi.com>Jeff Law2-47/+36
2000-06-07sh-dsp support, simulator speedup by using host byte order:Joern Rennecke1-1/+4
2000-05-30Remove illegal instruciton pattern, since it is the same as the breakpointNick Clifton2-7/+5
2000-05-30Add support for v4 SystemMode.Nick Clifton11-57/+159
2000-05-29Define GPR_CLEARNick Clifton2-0/+15
2000-05-29fix spelling mistake in commentNick Clifton1-1/+1
generated by cgit v1.1 at 2024-11-25 14:41:01 +0000