Age | Commit message (Collapse) | Author | Files | Lines |
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* cache.c (address_interference): Check for higher priority requests
in the same pipeline.
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* gencode.c (tab): Add entries for fsca and fsrra.
(expand_opcode): Allow variable length n / m fields.
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* frv-sim.h (REGNUM_LR): Removed.
(REGNUM_SPR_MIN,REGNUM_SPR_MAX): New macros.
* frv.c (frvbf_fetch_register): Fetch SPR registers based on
REGNUM_SPR_MIN and REGNUM_SPR_MAX. Check whether SPRs are implemented.
Return 0 for an unimplemented register. Return the length of the data
for an implemented register.
(frvbf_store_register): Ditto.
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2003-10-30 Andrew Cagney <cagney@redhat.com>
* traps.c: Replace "struct symbol_cache_entry" with "struct
bfd_symbol".
Index: sim/d10v/ChangeLog
2003-10-30 Andrew Cagney <cagney@redhat.com>
* simops.c: Replace "struct symbol_cache_entry" with "struct
bfd_symbol".
Index: sim/common/ChangeLog
2003-10-30 Andrew Cagney <cagney@redhat.com>
* sim-trace.c, sim-base.h: Replace "struct symbol_cache_entry"
with "struct bfd_symbol".
Index: ld/ChangeLog
2003-10-30 Andrew Cagney <cagney@redhat.com>
* emultempl/pe.em, pe-dll.c: Replace "struct symbol_cache_entry"
with "struct bfd_symbol".
Index: bfd/ChangeLog
2003-10-30 Andrew Cagney <cagney@redhat.com>
* syms.c: Replace "struct symbol_cache_entry" with "struct
bfd_symbol".
* vms.h, targets.c, section.c, reloc.c, peicode.h: Ditto.
* mipsbsd.c, elf.c, linker.c, elf-bfd.h, ecoff.c: Ditto.
* cpu-z8k.c, cpu-ns32k.c, cpu-h8500.c, bfd.c, bfd-in.h: Ditto.
* bfd-in2.h: Re-generate.
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* callback.c (os_truncate): Call "truncate", and not "stat".
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* targets.c: Replace "struct sec" with "struct bfd_section"
* syms.c, sparclynx.c, section.c, opncls.c: Ditto.
* libcoff-in.h, libbfd-in.h, elfxx-target.h: Ditto.
* elf.c, coffgen.c, bfd.c, bfd-in.h, aoutf1.h: Ditto.
* aout-tic30.c, aout-target.h:
* bfd-in2.h, libcoff.h, libbfd.h: Regenerate.
Index: binutils/ChangeLog
2003-10-19 Andrew Cagney <cagney@redhat.com>
* coffgrok.h (coff_section): Replace 'struct sec" with "struct
bfd_section".
Index: gdb/ChangeLog
2003-10-19 Andrew Cagney <cagney@redhat.com>
* symtab.c: Replace "struct sec" with "struct bfd_section".
* objfiles.c, linespec.c, blockframe.c, block.c: Ditto.
Index: ld/ChangeLog
2003-10-19 Andrew Cagney <cagney@redhat.com>
* pe-dll.c: Replace "struct sec" with "struct bfd_section".
Index: sim/common/ChangeLog
2003-10-19 Andrew Cagney <cagney@redhat.com>
* sim-base.h: Replace "struct sec" with "struct bfd_section".
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* h8300/compile.c : Addition of extern variable h8300_normal_mode
(SP) : Handle normal mode
(bitfrom) : Use normal mode flag to return suitable value
(lvalue) : Use normal mode flag to return command line location
(decode) : Decode instruction correctly for normal mode
(init_pointers) : Initialise memory correctly for normal mode
(sim_resume) : Handle cases for normal mode using h8300_normal_mode flag
(sim_store_register) : Handle 2 byte PC for normal mode
(sim_fetch_register) : Handle 2 byte PC for normal mode
(set_h8300h) : Set normal mode flag as per architechture
(sim_load) : Allocate 64K for normal mode instead of bigger memory
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* emul_netbsd.c: Only a comment may follow an #endif.
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* Makefile.in (sim_calls.o): No longer depends on gdb/tm.h.
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* callback.h (struct host_callback_struct): New members ftruncate
and truncate.
gdb:
sim/common:
* callback.c (os_ftruncate, os_truncate): New functions.
(default_callback): Initialize ftruncate and truncate members.
sim/sh:
* syscall.h (SYS_truncate, SYS_ftruncate): Define.
* interp.c (trap): Add support for SYS_ftruncate and SYS_truncate.
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Use bfd_section_size and bfd_get_section_vma.
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* sim/frv/testutils.inc (or_gr_immed): New macro.
* sim/frv/fp_exception-fr550.cgs: Write insns using
unaligned registers into the program in order to
cause the required exceptions.
* sim/frv/fp_exception.cgs: Ditto.
* sim/frv/regalign.cgs: Ditto.
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* cpu.h, sem.c: Regenerate.
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* configure.in: Move frv handling to alphabetically correct placement.
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* sim/frv/fr550: New subdirectory.
* sim/frv/fr400/*.cgs: Add fr550 as appropriate.
* sim/frv/fr500/*.cgs: Add fr550 as appropriate.
* sim/frv/interrupts/*.cgs: Add fr550 as appropriate.
* sim/frv/interrupts/*-fr550.cgs: New test cases for fr550.
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* profile-fr550.[ch]: New files.
* configure.in: Move frv handling to alphabetically correct placement.
* Makefile.in: Add fr550 support.
* frv-sim.h,frv.c,interrups.c,memory.c,mloop.in,pipeline.c,
profile.[ch],registers.c,traps.c: Add fr550 support.
* arch.c,arch.h,cpu.c,cpu.h,cpuall.h,model.h,decode.c,decode.h,sem.c:
Regenerate.
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* reset.c (frv_initialize): Call frv_register_control_init first.
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* profile.h (update_FR_ptime): New prototype.
(update_FRdouble_ptime): Ditto.
(update_SPR_ptime): Ditto.
(increase_ACC_busy): Ditto.
(enforce_full_acc_latency): Ditto.
(post_wait_for_SPR): Ditto.
* profile.c (update_FR_ptime): Moved here from profile-fr500.c.
(update_FRdouble_ptime): Ditto.
(update_SPR_ptime): New function.
(increase_ACC_busy): Ditto.
(enforce_full_acc_latency): Ditto.
(vliw_wait_for_fdiv_resource): Correct resource name.
(vliw_wait_for_fsqrt_resource): Ditto.
(post_wait_for_SPR): New function.
* profile-fr500.c (frvbf_model_fr500_u_commit): New function.
(frvbf_model_fr500_u_gr2fr): Pass out_FRk as output register to
adjust_float_register_busy.
(frvbf_model_fr500_u_gr_load): Record latency of SPR registers.
(frvbf_model_fr500_u_fr_load): Wait for and record latency of SPR
registers.
(frvbf_model_fr500_u_float_arith): Ditto.
(frvbf_model_fr500_u_float_dual_arith): Ditto.
(frvbf_model_fr500_u_float_div): Ditto.
(frvbf_model_fr500_u_float_sqrt): Ditto.
(frvbf_model_fr500_u_float_convert): Ditto.
(update_FR_ptime): Moved to profile.c
(update_FRdouble_ptime): Moved to profile.c
* profile-fr400.c (update_FR_ptime): Removed. Identical to functions
for other machines.
(update_FRdouble_ptime): Ditto.
* arch.h,cpu.h,sem.c,decode.[ch],model.c,sem.c: Regenerated.
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* sim/frv/nldqi.cgs: Remove. This insn was never implemented
by Fujitsu.
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* sim/frv/rstqf.cgs: Use nldq instead of nldqi.
* sim/frv/rstq.cgs: Use nldq instead of nldqi.
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* registers.c (frv_check_spr_read_access): Check for access to
ACC4-ACC63 and ACCG4-ACCG63.
* profile.h (frv-desc.h): #include it.
(spr_busy): New member of FRV_PROFILE_STATE.
(spr_latency): Ditto.
(GNER_FOR_GR): New macro.
(FNER_FOR_FR): New maccro.
(update_SPR_latency): New function.
(vliw_wait_for_SPR): New function.
* profile.c (profile-fr550.h): #include it.
(update_latencies): Update SPR latencies.
(update_target_latencies): Ditto.
(update_SPR_latency): New function.
(vliw_wait_for_SPR): New function.
* profile-fr500.c (frvbf_model_fr500_u_idiv): Record GNER latency.
(frvbf_model_fr500_u_trap): Removed unused variable, ps.
(frvbf_model_fr500_u_check): Ditto.
(frvbf_model_fr500_u_clrgr): New unit modeller for fr500.
(frvbf_model_fr500_u_clrfr): Ditto.
(frvbf_model_fr500_u_spr2gr): Wait for SPR.
(frvbf_model_fr500_u_gr2spr): Ditto.
* frv-sim.h (H_SPR_ACC4): New macro.
(H_SPR_ACCG4): New macro;
(H_SPR_ACC0): Removed.
(H_SPR_ACCG0): Removed.
* arch.h,model.c,sem[ch],decode.[ch]: Regenerated.
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* sim/testsuite/sim/frv/movgs.cgs: Change lcr to spr[273],
which according to the comments seems to be the intent.
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* profile.c (slot_names): FM1 was listed twice. Changed first
instance to FM0. Added IALL, FMALL and FMLOW.
(print_parallel): Don't examine slots with no insns.
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* sim/frv/maddaccs.cgs: move to fr400 subdirectory.
* sim/frv/msubaccs.cgs: move to fr400 subdirectory.
* sim/frv/masaccs.cgs: move to fr400 subdirectory.
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* frv.c (do_media_average): Select machine using a switch.
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On behalf of Doug Evans <dje@sebabeach.org>
* Makefile.in (stamp-arch,stamp-cpu,stamp-xcpu): Pass archfile to cgen.
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On behalf of Doug Evans <dje@sebabeach.org>
* Makefile.in (stamp-arch,stamp-cpu, stamp-desc): Pass archfile to cgen.
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On behalf of Doug Evans <dje@sebabeach.org>
* Makefile.in (stamp-arch,stamp-cpu): Pass archfile to cgen.
Remove copying of .cpu file to cgen/cpu, no longer needed.
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On behalf of Doug Evans <dje@sebabeach.org>
* cgen.sh: New arg archfile.
* Make-common.in (cgen-arch,cgen-cpu,cgen-defs,cgen-decode,
cgen-cpu-decode,cgen-desc): Update call to cgen.sh.
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* cpu.h, model.c, sem.c, decode.h, decode.c: Regenerated.
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* sim/frv/fr500/mclracc.cgs: Change mach to 'all',
to be consistant with other tests in the directory.
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* sim/frv/interrupts/Ipipe-fr400.cgs: New file.
* sim/frv/interrupts/Ipipe-fr500.cgs: New file.
* sim/frv/interrupts/Ipipe.cgs: Remove (replaced by above).
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* Makefile.in (stamp-arch): Copy frv.cpu from $(srcdir)../../cpu
temporarily when regenerating files.
(stamp-cpu): Ditto.
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* MAINTAINERS: Add myself as maintainer of the FRV port.
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Dave Brolley <brolley@redhat.com>
* frv/: New directory, simulator for the Fujitsu FR-V.
* testsuite/frv-elf/: New directory.
* testsuite/sim/frv/: New directory.
* configure.in: Add frv configury.
* configure: Regenerate.
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Dave Brolley <brolley@redhat.com>
* cgen-par.h (flags, word1): New target-specific
fields of CGEN_WRITE_QUEUE_ELEMENT.
(CGEN_WRITE_QUEUE_ELEMENT_FLAGS): New accessor macro.
(CGEN_WRITE_QUEUE_ELEMENT_WORD1): New accessor macro.
* gennltvals.sh: Add frv target.
* nltvals.def: Add frv target.
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On behalf of Dave Brolley
* sim/frv: New testsuite.
* frv-elf: New testsuite.
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2003-08-28 Andrew Cagney <cagney@redhat.com>
* dv-glue.c (hw_glue_finish): Change %d to %ld to match sizeof.
* sim-options.c (print_help): Cast the format with specifier to
"int".
Index: mn10300/ChangeLog
2003-08-28 Andrew Cagney <cagney@redhat.com>
* dv-mn103ser.c (do_polling_event): Change type of "serial_reg" to
"long".
(read_status_reg): Cast "serial_reg" to "long".
* dv-mn103tim.c (do_counter_event): Change type of "timer_nr" to
"long".
(do_counter6_event, write_mode_reg, write_tm6md): Ditto.
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* macl.s: New file.
* macw.s: New file.
* allinsn.exp: Add new tests for mac.w and mac.l.
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* sim/sh/gencode.c ( tab[] ): Addition of MAC.L handler and
correction for MAC.W handler
* sim/sh/interp.c ( macl ): New Function. Implementation of
MAC.L handler.
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