Age | Commit message (Expand) | Author | Files | Lines |
2017-02-13 | sim: use ARRAY_SIZE instead of ad-hoc sizeof calculations | Mike Frysinger | 39 | -62/+141 |
2017-01-23 | Add support for cmtst. | Jim Wilson | 4 | -0/+113 |
2017-01-17 | Fixes for addv and xtn2 instructions. | Jim Wilson | 5 | -31/+158 |
2017-01-09 | Fix problems with the implementation of the uzp1 and uzp2 instructions. | Jim Wilson | 4 | -17/+273 |
2017-01-04 | Five fixes, for fcsel, fcvtz, fminnm, mls, and non-widening mul. | Jim Wilson | 9 | -33/+618 |
2017-01-01 | update copyright year range in GDB files | Joel Brobecker | 576 | -576/+576 |
2016-12-21 | Fix bugs with float compare and Inf operands. | Jim Wilson | 4 | -0/+184 |
2016-12-14 | MAINTAINERS: Add myself as a MIPS maintainer | Maciej W. Rozycki | 2 | -0/+6 |
2016-12-13 | Fix aarch64 sim bug with adds64, and add testcases for last 3 bug fixes. | Jim Wilson | 7 | -45/+309 |
2016-12-03 | Fix bugs with tbnz/tbz instructions.users/ARM/embedded-binutils-master-2016q4 | Jim Wilson | 2 | -3/+8 |
2016-12-01 | Fix typo in ChangeLog entry. | Jim Wilson | 1 | -1/+1 |
2016-12-01 | Fix bug with FP stur instructions. | Jim Wilson | 2 | -6/+11 |
2016-11-12 | sim: mips: add PR info to ChangeLog | Mike Frysinger | 1 | -0/+2 |
2016-11-11 | sim: mips: fix dv-tx3904cpu build error | Mike Frysinger | 2 | -0/+10 |
2016-11-11 | sim: mips: fix builds for r3900 cpus due to missing check_u64 | Mike Frysinger | 2 | -0/+5 |
2016-10-18 | sim: avr: move changelog entries to subdir | Mike Frysinger | 2 | -7/+7 |
2016-08-16 | sim: m68hc11: use standard STATIC_INLINE helper | Mike Frysinger | 2 | -25/+34 |
2016-08-15 | sim: unify symbol table handling | Mike Frysinger | 17 | -170/+164 |
2016-08-13 | sim: m68hc11: standardize sim_cpu naming | Mike Frysinger | 10 | -347/+366 |
2016-08-13 | sim: m68hc11: fix up various prototype related warnings | Mike Frysinger | 8 | -12/+29 |
2016-08-13 | sim: cgen: constify mode_names | Mike Frysinger | 3 | -2/+7 |
2016-08-13 | sim: cgen: drop unused argv/envp definitions | Mike Frysinger | 2 | -8/+5 |
2016-08-13 | sim: bfin: split out common mach/model defines into arch.h [PR sim/20438] | Mike Frysinger | 4 | -26/+55 |
2016-08-12 | Undo the previous change to the aarch64 sim - exporting aarch64_step() - and ... | Nick Clifton | 3 | -9/+19 |
2016-08-11 | Export the single step function from the AArch64 simulator. | Nick Clifton | 4 | -9/+19 |
2016-07-27 | Wean gdb and sim off private libbfd.h header | Alan Modra | 6 | -7/+18 |
2016-07-21 | Fix typo fsqrt -> sqrtf. | Nick Clifton | 1 | -1/+1 |
2016-07-21 | Use fsqrt() to calculate float (rather than double) square root. | Nick Clifton | 2 | -1/+5 |
2016-07-19 | Update PC when simulate break instruction. | Denis Chertykov | 2 | -2/+8 |
2016-07-14 | Small improvements to the ARM simulator to cope with illegal binaries. | Nick Clifton | 3 | -4/+13 |
2016-06-30 | Add support for simulating big-endian AArch64 binaries. | Jim Wilson | 3 | -9/+30 |
2016-05-06 | Add support for FMLA (by element) to AArch64 sim. | Nick Clifton | 2 | -2/+77 |
2016-04-27 | Fix a typo in the check for SNANs in the RX simulator. | Nick Clifton | 2 | -1/+7 |
2016-04-27 | Add support for the --trace-decode option to the AArch64 simulator. | Nick Clifton | 2 | -7/+317 |
2016-04-10 | Fix primary reason why the SH simulation hasn't been working on 64 bit hosts. | Oleg Endo | 3 | -37/+21 |
2016-04-10 | Move ChangeLog entries from sim/ChangeLog to sim/sh/ChangeLog. | Oleg Endo | 2 | -5/+5 |
2016-04-09 | Adjust default memory size and stack base address for SH simulator. | Oleg Endo | 2 | -3/+8 |
2016-04-04 | Ignore DWARF debug information with a version of 0 - assume that it is padding. | Nick Clifton | 1 | -12/+189 |
2016-03-30 | Fix more bugs in AArch64 simulator. | Nick Clifton | 5 | -196/+323 |
2016-03-29 | Tidy up AArch64 simulator code. | Nick Clifton | 4 | -1469/+1413 |
2016-03-23 | More AArch64 simulator improvements. | Nick Clifton | 6 | -278/+721 |
2016-03-18 | Fix thinko in new GET_VEC_ELEMENT macro. | Nick Clifton | 2 | -1/+2 |
2016-03-18 | Fix code to check for illegal element numbers when accessing AArch64 vector r... | Nick Clifton | 2 | -2/+6 |
2016-03-18 | Add simulation of MUL and NEG instructions to AArch64 simulator. | Nick Clifton | 5 | -223/+341 |
2016-03-03 | Fix bugs in the simulation of the AArch64's ADDP, FADDP, LD1, CCMP and CCMP i... | Nick Clifton | 2 | -44/+93 |
2016-02-05 | sim: mips: fix prog_bfd usage | Mike Frysinger | 3 | -2/+8 |
2016-02-04 | Prevent possible undefined behaviour computing the size of the scache by usin... | Nick Clifton | 2 | -11/+19 |
2016-02-03 | MAINTAINERS: Add Thiemo Seufer back, as a past maintainer | Maciej W. Rozycki | 2 | -0/+5 |
2016-01-18 | MIPS: Only build microMIPS specific simulator functions if microMIPS support ... | Andrew Bennett | 2 | -0/+42 |
2016-01-17 | Minor comment fixes in sim/common/sim-fpu.c. | Joel Brobecker | 2 | -67/+71 |