| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 1997-10-22 | Add LMA_P and DO_WRITE arguments to sim/common/sim-load.c:sim_load_file(). | Andrew Cagney | 9 | -9/+102 |
| 1997-10-22 | * nrun.c (main): Exit if bfd_openr fails. | Doug Evans | 1 | -0/+1 |
| 1997-10-22 | * nrun.c (main): Remove useless test of name != NULL. | Doug Evans | 2 | -3/+20 |
| 1997-10-21 | * simops.c: Correctly handle register restores for "ret" and "retf" | Jeff Law | 2 | -66/+71 |
| 1997-10-21 | Use SIM*_OVERFLOW_RESULT defined in sim-alu.h | Andrew Cagney | 2 | -2/+7 |
| 1997-10-21 | Pacify GCC -Wall | Andrew Cagney | 1 | -0/+6 |
| 1997-10-21 | Output pc profile statistics once gathered. | Andrew Cagney | 2 | -9/+5 |
| 1997-10-21 | Delete profile support from MIPS simulator, use sim/common/sim-profile | Andrew Cagney | 5 | -225/+46 |
| 1997-10-20 | Have single bit macros return an unsigned result. Avoids risk (and | Andrew Cagney | 2 | -16/+33 |
| 1997-10-20 | Make mips registers of type unsigned_word. | Andrew Cagney | 3 | -3/+14 |
| 1997-10-20 | Add 8 bit arithmetic to sim-alu. | Andrew Cagney | 3 | -2/+15 |
| 1997-10-17 | Preliminary tests for sim-alu module. | Andrew Cagney | 3 | -0/+189 |
| 1997-10-16 | Move register definitions and macros out of interp.c and into sim-main.h | Andrew Cagney | 4 | -274/+362 |
| 1997-10-16 | Checkpoint IGEN version of MIPS simulator. | Andrew Cagney | 1 | -248/+218 |
| 1997-10-16 | Rename generated file engine.c to oengine.c. | Andrew Cagney | 3 | -6/+13 |
| 1997-10-16 | * gencode.c (build_instruction): Use FPR_STATE not fpr_state. | Andrew Cagney | 2 | -6/+10 |
| 1997-10-16 | * gencode.c (build_instruction): For "FPSQRT", output correct number | Andrew Cagney | 2 | -1/+8 |
| 1997-10-16 | * gen-semantics.c (print_semantic_body): Use CIA not cia.ip. Escape | Andrew Cagney | 1 | -0/+6 |
| 1997-10-15 | Sanitize additional files. | Andrew Cagney | 1 | -0/+3 |
| 1997-10-15 | Enable d10v simulator testsuite - two tests: Hello World and exit47. | Andrew Cagney | 4 | -0/+1072 |
| 1997-10-14 | Handle core regions which start at a poorly aligned address. | Andrew Cagney | 3 | -27/+51 |
| 1997-10-14 | * sim-alu.h (ALU64_HAD_OVERFLOW): Define. | Andrew Cagney | 3 | -6/+21 |
| 1997-10-14 | Checkpoint IGEN version of MIPS simulator. | Andrew Cagney | 1 | -1239/+1196 |
| 1997-10-14 | Move global MIPS simulator variables into sim_cpu struct. | Andrew Cagney | 4 | -330/+369 |
| 1997-10-14 | Correct type of address argument for sim_core_{read,write} | Andrew Cagney | 2 | -2/+22 |
| 1997-10-14 | o Add support for configuring wordsize, fp hardware and target | Andrew Cagney | 8 | -543/+822 |
| 1997-10-14 | Output line-ref to original igen source file when generating trace | Andrew Cagney | 3 | -15/+54 |
| 1997-10-13 | * simops.c (OP_6A01): Change OP_POSTDEC to OP_POSTINC and move | Fred Fish | 2 | -8/+15 |
| 1997-10-11 | * simops.c (OP_6401): postdecrement on r15 is OK, remove exception. | Fred Fish | 1 | -15/+3 |
| 1997-10-11 | * simops.c (OP_6401): postdecrement on r15 is OK, remove exception. | Fred Fish | 1 | -0/+9 |
| 1997-10-09 | Snap. Gets through igen's checks. | Andrew Cagney | 1 | -322/+104 |
| 1997-10-09 | Add -Wnodiscard option so that warning about discarded instructions | Andrew Cagney | 4 | -928/+1555 |
| 1997-10-09 | Build IGEN with the MIPS simulator. | Andrew Cagney | 1 | -0/+1 |
| 1997-10-08 | MIPS/IGEN checkpoint - doesn't build. | Andrew Cagney | 3 | -0/+10004 |
| 1997-10-07 | Checkpoint IGEN input file for MIPS simulator. | Andrew Cagney | 1 | -0/+2 |
| 1997-10-03 | Rewrite simulator floating point module. Do not rely on host FP | Andrew Cagney | 4 | -41/+602 |
| 1997-10-02 | Fix typo, WITH_TARGET_WORD_BITSIZE not WITH_TARGET_BITSIZE. | Andrew Cagney | 6 | -6/+51 |
| 1997-09-30 | Add access to hi part of r5900 128 bit registers. | Andrew Cagney | 1 | -0/+13 |
| 1997-09-29 | * configure: Regenerated. | Bob Manson | 1 | -0/+4 |
| 1997-09-29 | Do not sanitize out sim/testsuite/common directory. | Andrew Cagney | 2 | -1/+42 |
| 1997-09-27 | * d10v_sim.h (INC_ADDR): Align MOD_E to increment before testing | Fred Fish | 1 | -0/+2 |
| 1997-09-27 | * interp.c (pc_addr): Discard upper bit(s) of PC in case | Fred Fish | 1 | -0/+9 |
| 1997-09-26 | * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB. | Mark Alexander | 2 | -7/+108 |
| 1997-09-26 | * sim-main.h: delete null override of SIM_ENGINE_HALT_HOOK and | Felix Lee | 1 | -0/+16 |
| 1997-09-25 | * sim-break.c (sim_set_breakpoint sim_clear_breakpoint): Use ZALLOC | Stu Grossman | 1 | -2/+2 |
| 1997-09-25 | Add/use SIM_AC_OPTION_BITSIZE. | Andrew Cagney | 5 | -51/+99 |
| 1997-09-25 | * config/v850/tm-v850.h (BREAKPOINT): Use 1 word DIVH insn with | Andrew Cagney | 1 | -0/+4 |
| 1997-09-25 | Allow gencode.c to generate input to the igen generator. | Andrew Cagney | 2 | -201/+489 |
| 1997-09-25 | Pacify GCC -Wall | Andrew Cagney | 1 | -0/+5 |
| 1997-09-25 | * Make-common.in: New files sim-break.c, sim-break.h. | Stu Grossman | 5 | -0/+331 |
