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1997-09-16Add {LS,MS}SEXT and {LS,MS}INSERTED macros. Eliminates bug in SEXT.Andrew Cagney3-25/+107
1997-09-16Use trace_one_insn in trace functions. Buffer up trace data so thatAndrew Cagney3-164/+133
it is displayed in a single block.
1997-09-16v850eq simulator tests.Andrew Cagney6-0/+132
1997-09-16Restrict ldsr (load system register) to modifying just non-reserved PSW bits.Andrew Cagney5-59/+55
For v850eq, include PSW[US] in bits that can be modified.
1997-09-16Add v850e version of breakpoint instruction.Andrew Cagney4-5/+34
1997-09-16Differentiate between a non-zero string and a constant zero field.Andrew Cagney1-0/+5
1997-09-16 * simops.c (Multiply64): Don't store into register zero.Jim Wilson2-2/+11
1997-09-15For instructions moved into v850.igen was computing (wrong) NIA whenAndrew Cagney4-14/+28
this wasn't needed.
1997-09-15 * igen.c (gen_run_c): Handle non-multi-sim case.Andrew Cagney2-22/+36
1997-09-15Fix sanitization for v850 V v850e V v850eqAndrew Cagney5-429/+506
1997-09-15Update to reflect change to sim/common/aclocal.m4 (allow sim/commonAndrew Cagney9-26/+55
directory to specify its own unqiue config.h file).
1997-09-15For v850eq start up with US bit set.Andrew Cagney6-333/+244
Let sim_analyze_program determine the architecture. Fix various sanitizations.
1997-09-15Determine ARCHITECTURE from program if possible.Andrew Cagney2-2/+14
Rename common's generated config.h to cconfig.h.
1997-09-15 * callback.c (os_write): divert stdout and stderr to theirAndrew Cagney1-0/+5
respective hooks.
1997-09-12Check reserved bits before executing instructions.Andrew Cagney7-43/+144
Make v850[eq] the the default simulator. Report illegal instructions. Include v850e instructions in v850eq.
1997-09-12v850eq wasn't building igen directory.Andrew Cagney3-0/+9
1997-09-12Add profiling support to v850*.Andrew Cagney6-16/+83
1997-09-12Short form of sample-size option had wrong value.Andrew Cagney2-1/+6
1997-09-12v850* wants igenAndrew Cagney1-0/+8
1997-09-12Generate instruction profile call with each instruction.Andrew Cagney1-0/+6
1997-09-11Wed Sep 10 22:30:24 1997 Martin M. Hunt <hunt@cygnus.com>Martin Hunt1-0/+7
* interp.c (sim_resume): Increment PC at end of rep loop. * simops.c (OP_4201): Fix rachi instruction.
1997-09-10mips/sim_info was just returning?????Andrew Cagney2-2/+4
1997-09-10o Wordwrap usage messages from sim-optionsAndrew Cagney5-17/+81
o Clarify how to use alias options o use in sim-watch (better usage message) o Don't pass something on the stack into the watch-point interrupt hander.
1997-09-10(gen_itable_h): Output an enum defining the max size of the itableAndrew Cagney1-0/+7
string members.
1997-09-10Have trace_input, trace_output use sim-trace for IO.Andrew Cagney2-47/+66
1997-09-10 * inst.h (sim_state): rename to h8300_sim_state, to avoid conflictFelix Lee3-2/+13
with sim/common. * configure.in: check for sys/param.h * compile.c: #ifdef HAVE_SYS_PARAM_H. #define SIGTRAP for wingdb. (sim_resume): poll keyboard at least once per call. (sim_resume): use host_callback instead of printf for syscall output.
1997-09-10Add option architecture-info to list supported architectures.Andrew Cagney2-0/+26
1997-09-10Support tx19 sanitation.Gavin Romig-Koch1-0/+30
1997-09-10 * sim-core.h (sim_cpu_core): [WITH_XOR_ENDIAN + 1], to avoidFelix Lee2-1/+7
illegal zero-sized array. * sim-core.c (sim_core_xor_read_buffer): same.
1997-09-10 * interp.c (sim_resume): poll_quit() at least once per call;Felix Lee1-0/+5
otherwise gdb can loop sim_resume() uninterruptably.
1997-09-09 * nltvals.def: Regenerate.David Edelsohn1-0/+4
1997-09-09Better word error messages.Andrew Cagney2-2/+7
1997-09-09Remove GCC specific `0x...LL', replace with SIGNED64 (0x...).Andrew Cagney2-14/+17
1997-09-09Add basic tests for d10v-elf simulator.Andrew Cagney2-0/+14
1997-09-08Add multi-sim support to v850/v850e/v850eq simulators.Andrew Cagney8-483/+1625
1997-09-08Add multi-sim support to simulator.Andrew Cagney6-799/+3243
1997-09-08Use updated MSMASK, MSMASKED macros.Andrew Cagney3-10/+10
Fix sat problem in d30v.
1997-09-08Check MS* macros from sim/common.Andrew Cagney2-0/+574
1997-09-08Add/use LSEXTRACTED, MSEXTRACTED macros.Andrew Cagney4-184/+228
Add CPU_CIA macro to extract the PC.
1997-09-08Sanity check for tic80 simulator.Andrew Cagney4-0/+1103
1997-09-07tx19 and related necessary changes.Gavin Romig-Koch3-0/+18
* config.sub: Add tx19/r1900. * sim/mips/configure.in, sim/mips/gencode: Add tx19/r1900. * gcc/config.sub, gcc/configure: Add tx19/r1900. * gcc/config/mips/r1900.h, config/mips/t-r1900: New. * gas/config/tc-mips.c: Add tx19/r1900. * gcc/config/mips/mips.c: Don't build 16 bit to 32 bit stubs for TARGET_SOFT_FLOAT. * config.sub: Add "marketing-names" patch. * gcc/config.sub: Add "marketing-names" patch. * gcc/configure: Change "as" link from "../gas/as.new" to "../gas/as-new"; Same for "ld" link.
1997-09-05Redo watchpoint code so that it target can specify interrupt names.Andrew Cagney4-214/+370
Replace v850 interrupt code with this common watchpoint code. Other minor fixes to core.
1997-09-05Add sim_do_commandf - printf version of sim_do_command.Andrew Cagney2-0/+22
1997-09-05* configure: Regenerated to track ../common/aclocal.m4 changes.David Edelsohn17-388/+1587
1997-09-05Define SIGNED64 and UNSIGNED64 macros - handle MSC/GCC LL issue.Andrew Cagney7-22/+223
1997-09-04Replace memory model with one from sim/common directory.Andrew Cagney7-323/+213
1997-09-04Finish implementation of sim-memopt.Andrew Cagney10-82/+194
Use in d30v and tic80. Make available a generic sim_read, sim_write implementation.
1997-09-04o Add modulo argument to sim_core_attachAndrew Cagney18-224/+768
o Add sim-memopt module - memory option processing.
1997-09-04 * sim-hload.c (sim_load): Add assert for SIM_MAGIC_NUMBER.David Edelsohn1-0/+2
1997-09-04 * gdbinit.in: New file.David Edelsohn6-73/+227
* aclocal.m4 (SIM_AC_OUTPUT): Build .gdbinit. * Make-common.in (distclean): Delete .gdbinit. (.gdbinit): Add rule for. * configure: Regenerated to track ../common/aclocal.m4 changes.
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