Age | Commit message (Collapse) | Author | Files | Lines |
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* emul_unix.c (emul_unix_create): Likewise.
* tree.c (libiberty.h): Include it.
(tree_quote_property): New function.
* tree.h (tree_quote_property): Declare.
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call meminfo. Return ENOSYS for unhandled RedBoot syscalls.
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(unsigned32): Define as "unsigned int".
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2005-10-06 Jim Blandy <jimb@redhat.com>
Add simulator for Renesas M32C and M16C.
* m32c: New directory.
* configure.ac: Add entry for Renesas M32C.
* configure: Regenerate.
sim/m32c/ChangeLog:
2005-10-06 Jim Blandy <jimb@redhat.com>
Simulator for Renesas M32C and M16C, by DJ Delorie <dj@redhat.com>,
with further work from Jim Blandy <jimb@redhat.com> and
Kevin Buettner <kevinb@redhat.com>.
* ChangeLog: New.
* Makefile.in: New.
* blinky.S: New.
* config.in: New.
* configure: New.
* configure.in: New.
* cpu.h: New.
* gdb-if.c: New.
* gloss.S: New.
* int.c: New.
* int.h: New.
* load.c: New.
* load.h: New.
* m32c.opc: New.
* main.c: New.
* mem.c: New.
* mem.h: New.
* misc.c: New.
* misc.h: New.
* opc2c.c: New.
* r8c.opc: New.
* reg.c: New.
* safe-fgets.c: New.
* safe-fgets.h: New.
* sample.S: New.
* sample.ld: New.
* sample2.c: New.
* srcdest.c: New.
* syscalls.c: New.
* syscalls.h: New.
* trace.c: New.
* trace.h: New.
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sim/cris/asm/x7-v10.ms: Update expected cycle output.
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cycle count for the current insn.
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* utils-dsp.inc: New file.
* mips32-dsp.s: New test.
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(dsp.o): New dependency.
(IGEN_INCLUDE): Add dsp.igen.
* configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
mipsisa64*-*-*): Add dsp to sim_igen_machine.
* configure: Regenerate.
* mips.igen: Add dsp model and include dsp.igen.
(MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
because these instructions are extended in DSP ASE.
* sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
adding 6 DSP accumulator registers and 1 DSP control register.
(AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
DSPCR_CCOND_SMASK): New define.
(DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
* dsp.c, dsp.igen: New files for MIPS DSP ASE.
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cris/decodev10.c, cris/decodev10.h, cris/decodev32.c,
cris/decodev32.h, cris/modelv10.c, cris/modelv32.c,
cris/semcrisv10f-switch.c, cris/semcrisv32f-switch.c: Regenerate.
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* sim/cris/asm/movmp.ms: Do not write to P0, P4 or P8.
* sim/cris/asm/raw13.ms: Write to MOF instead of WZ (P4).
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cris/cpuv10.h, cris/cpuv32.c, cris/cpuv32.h, cris/cris-desc.c,
cris/cris-desc.h, cris/cris-opc.h, cris/decodev10.c,
cris/decodev10.h, cris/decodev32.c, cris/decodev32.h,
cris/modelv10.c, cris/modelv32.c, cris/semcrisv10f-switch.c,
cris/semcrisv32f-switch.c: Regenerate.
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* configure.in: Regenerate.
* config.in: Likewise.
* emul_netbsd.c (write_timezone): Guard with HAVE_GETTIMEOFDAY.
* emul_unix.c (do_unix_mkdir): Handle Win32 1-argument mkdir.
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sim_resume. Expect target signal numbers from sim_stop_reason.
* wrapper.c (gdb/signals.h): Include it.
(SIGTRAP): Don't define.
(SIGBUS): Likewise.
(sim_stop_reason): Use TARGET_SIGNAL_* instead of SIG*.
* sim-reason.c (sim_stop_reason): Use
sim_signal_to_target, not sim_signal_to_host.
* sim-signal.c (sim_signal_to_host): Fix typo.
(sim_signal_to_target): New function.
* interp.c (gdb/signals.h): Include it.
(sim_stop_reason): Use TARGET_SIGNAL_*.
* interf.c: (gdb/signals.h): Include it.
(sim_stop_reason): Use TARGET_SIGNAL_*.
* sim_calls.c (gdb/signals.h): Include it.
(sim_stop_reason): Use TARGET_SIGNAL_*.
* psim.c (cntrl_c_simulation): Use TARGET_SIGNAL_*.
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simulator.
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(open_map): Use TARGET_O_ACCMODE, TARGET_O_RDONLY and
TARGET_O_WRONLY.
(cris_break_13_handler) <case TARGET_SYS_fcntl>: Add support for
F_GETFL on fd 0, 1 and 2.
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last_open_fd, last_open_flags.
* cris/traps.c: Don't include targ-vals.h.
(TARGET_O_ACCMODE): Define.
(cris_break_13_handler): Set new _sim_cpu members.
<case TARGET_SYS_fcntl>: Support special case of F_GETFL.
Rearrange code as switch. Emit "unimplemented" abort for
unimplemented fcntl calls.
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(syscall_stat32_map): Add entry for TARGET_SYS_stat.
(cris_break_13_handler) <case TARGET_SYS_stat>: New case.
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* sim/arm/armos.c: Include limits.h
(unlink): Remove this macro. It is unused in this file and
conflicts with sim_callback->unlink.
(PATH_MAX): Define as 1024 if not already defined.
(ReadFileName): New function.
(SWIopen): Fix a potential buffer overflow.
(SWIremove): New function.
(SWIrename): Ditto.
(ARMul_OSHandleSWI): Handle the RDP calls SWI_IsTTY,
SWI_Remove, and SWI_Rename, as well as the RDI calls
AngelSWI_Reason_IsTTY, AngelSWI_Reason_Remove, and
AngelSWI_Reason_Rename.
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low 32 bits are used after an unsigned long cast.
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* interp.c (sim_memory_size): Use same amount of memory on Windows as
elsewhere.
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* cpu.c,cpu.h,decode.c,decode.h,model.c,sem.c: Regenerate.
Contribute the following changes:
2003-09-29 Dave Brolley <brolley@redhat.com>
* frv-sim.h: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
CGEN_ATTR_VALUE_TYPE.
* mloop.in: Ditto.
* pipeline.c: Ditto.
* traps.c: Ditto.
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* armdefs.h: Define ARMsword and ARMsdword. Use stdint.h when
available.
* armemu.c: Use them.
* armvirt.c (ARMul_MemoryInit): Use correct type for size.
* configure.ac: Check for stdint.h.
* config.in: Regenerate.
* configure: Regenerate.
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(mcalloc): New function / macro.
(mfree): New macro.
(sim_size): Use mcalloc and mfree.
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* hw_register.c: Likewise.
* hw_trace.c: Likewise.
* hw_vm.c: Likewise.
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change.
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different fraction for a quiet NaN.
(unpack_fpu): Likewise.
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* sim-load.c: Likewise.
* syscall.c: Likewise.
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Ralf Corsepius <ralf.corsepius@rtems.org>.
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(check_u64): Add mips16e tag.
* m16e.igen: New file for MIPS16e instructions.
* configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
models.
* configure: Regenerate.
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* MAINTAINERS: Update my mail address, move myself to the
"Past maintainers" section.
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* mips.igen (mips32r2, mips64r2): New ISA models. Add new model
tags to all instructions which are applicable to the new ISAs.
(do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
vr.igen.
* mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
instructions.
* vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
to mips.igen.
* configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
* configure: Regenerate.
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(ARMul_ThumbDecode): Call handle_v6_thumb_insn() when an undefined instruction
binary is encountered.
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check.
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* configure: Regenerate.
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