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2000-10-262000-10-26 Ben Elliston <bje@redhat.com>Elena Zannoni3-7/+22
* cgen.sh: Handle an isa argument between cpu and mach. Default to `all'. Pass `-i' options to cgen applications. * Make-common.in (cgen-arch, cgen-cpu, cgen-decode, cgen-cpu-decode, cgen-desc): Pass $(isa) to cgen.sh.
2000-10-25 * MAINTAINERS: Added self and Andrew for the ppc sim.Geoffrey Keating2-1/+9
2000-10-24 * ppc-instructions (lfsux): Correct XO field of lfsux instruction.Geoffrey Keating2-1/+5
2000-10-24* pendanticismBen Elliston2-15/+17
2000-10-24 Ben Elliston <bje@redhat.com> * gencode.c (tab): Delimit strings with commas where applicable.
2000-10-19* cleanupFrank Ch. Eigler2-5/+5
2000-10-19 Frank Ch. Eigler <fche@redhat.com> On advice from Chris G. Demetriou <cgd@sibyte.com>: * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
2000-10-08* usability improvementsBen Elliston3-0/+27
2000-10-08 Ben Elliston <bje@redhat.com> * cgen-utils.c (cgen_rtx_error): New function. 2000-10-07 Ben Elliston <bje@redhat.com> * cgen-trace.c (sim_cgen_disassemble_insn): Handle failure conditions for sim_core_read_buffer().
2000-10-062000-10-06 Dave Brolley <brolley@redhat.com>Dave Brolley4-3/+21
* sem.c: Regenerated. * sem-switch.c: Regenerated. * semx-switch.c: Regenerated.
2000-10-062000-10-06 Dave Brolley <brolley@redhat.com>Dave Brolley3-2/+15
* sem.c: Regenerated. * sem-switch.c: Regenerated.
2000-09-262000-09-26 Dave Brolley <brolley@redhat.com>Dave Brolley2-0/+75
* cgen-utils.c (RORQI): New function. (ROLQI): New function. (RORHI): New function. (ROLHI): New function.
2000-09-15Replace StrongARM property with v4 and v5 properties.Nick Clifton6-90/+119
2000-09-12Missing Makefile.in for 68hc11 simulatorStephane Carrez2-0/+64
2000-09-10Remove soft reg hack in the 68hc11 simulatorStephane Carrez3-60/+8
2000-09-10Fix clearing of interrupts in 68hc11 simulatorStephane Carrez2-4/+21
2000-09-09 * sim-main.h: Define cycle_to_string.Stephane Carrez7-26/+70
* dv-m68hc11tim.c (cycle_to_string): New function to translate the cpu cycle into some formatted time string. (m68hc11tim_print_timer): Use it. * dv-m68hc11sio.c (m68hc11sio_info): Use cycle_to_string. * dv-m68hc11spi.c (m68hc11spi_info): Likewise. * interrupts.c (interrupts_info): Likewise. * m68hc11_sim.c (cpu_info): Likewise.
2000-09-06Fix 68hc11 timer device (accuracy, io, timer overflow)Stephane Carrez2-115/+197
2000-09-05Fix 68HC11 SPI simulatorStephane Carrez2-8/+38
2000-08-282000-08-28 Dave Brolley <brolley@redhat.com>Dave Brolley11-181/+346
* Makefile.in: Use of @true confuses VPATH. Remove it. * cpu.h: Regenerated. * cpux.h: Regenerated. * decode.c: Regenerated. * decodex.c: Regenerated. * model.c: Regenerated. * modelx.c: Regenerated. * sem-switch.c: Regenerated. * sem.c: Regenerated. * semx-switch.c: Regenerated.
2000-08-282000-08-28 Dave Brolley <brolley@redhat.com>Dave Brolley3-78/+176
* cpu.h: Regenerated. * decode.c: Regenerated.
2000-08-282000-08-28 Dave Brolley <brolley@redhat.com>Dave Brolley2-1/+13
* cgen-trace.c (sim_cgen_disassemble_insn): Make sure entire insn is in insn_value if it will fit.
2000-08-22Forgot to check this in with last commit!Dave Brolley1-0/+15
2000-08-21* Contribute CGEN simulator build support code.Frank Ch. Eigler9-4/+325
* Patch was posted by bje@redhat.com.
2000-08-152000-08-15 Dave Brolley <brolley@redhat.com>Dave Brolley1-2/+2
* sim-profile.c (profile_print_speed): Print cpu frequency if not zero.
2000-08-152000-08-15 Dave Brolley <brolley@redhat.com>Dave Brolley2-6/+103
* sim-profile.h (PROFILE_DATA): Add cpu_freq. (PROFILE_CPU_FREQ): New macro. * sim-profile.c (OPTION_PROFILE_CPU_FREQUENCY): New enumerator. (profile-options): Add profile-cpu-frequency. (parse_frequency): New function. (profile_option_handler): Handle OPTION_PROFILE_CPU_FREQUENCY. (profile_print_speed): Print cpu frequency and simulated execution time. Re-indent other items to match.
2000-08-15Compute write back value for post increment loads beforeNick Clifton2-34/+47
performing the load in case the offset register is overwritten.
2000-08-11Use address mapping levels for 68hc11 simulator (kill overlap hack)Stephane Carrez9-39/+67
2000-08-112000-08-10 Kazu Hirata <kazu@hxi.com>Kazu Hirata2-8/+10
* compile.c (decode): Clean up the code.
2000-08-11Eliminate use of MIN().Andrew Cagney2-2/+7
2000-08-09* am33.igen: Warning clean-up.Alexandre Oliva2-42/+24
(movm): Initialize PC and mask. (mov, movbu, movhu): Set srcreg2 from RI0. (bsch): Initialize c. (sat16_cmp): Actually do the comparison. (mov_llt): Do not overwrite dstreg with uninitialized variable.
2000-07-27* Usability improvementFrank Ch. Eigler2-1/+6
2000-07-27 Frank Ch. Eigler <fche@redhat.com> From Maciej W. Rozycki <macro@ds2.pg.gda.pl> * Makefile.in (install): Install run.1 man page.
2000-07-27Don't clean *.igen.Andrew Cagney2-1/+6
2000-07-272000-06-23 Doug Evans <dje@casey.transmeta.com>Andrew Cagney2-8/+10
* Makefile.in (headers,nltvals.def): Merge.
2000-07-272000-06-25 Stephane Carrez <Stephane.Carrez@worldnet.fr>Andrew Cagney3-2/+9
* nrun.c (main): Print the simulator statistics only in verbose mode. * hw-properties.h (hw_find_integer_array_property): Fix prototype (use signed_cell).
2000-07-272000-06-25 Stephane Carrez <Stephane.Carrez@worldnet.fr>Andrew Cagney5-0/+39
* sim-events.c (sim_events_remain_time): New function returning the time that remains before the event is raised. * hw-events.c (hw_event_remain_time): Likewise. * sim-events.h (sim_events_remain_time): Declare. * hw-events.h (hw_event_remain_time): Declare.
2000-07-272000-06-25 Stephane Carrez <Stephane.Carrez@worldnet.fr>Andrew Cagney2-1/+17
* sim-hw.c: Use <errno.h> instead of <sys/errno.h> (OPTION_HW_LIST): New option --hw-list to list the devices. (hw_option_handler): List the device tree with 'sim_hw_print'.
2000-07-27Add m68hc11 configry.Andrew Cagney5-0/+4366
2000-07-27New simulator.Andrew Cagney16-0/+7449
2000-07-27From 2000-06-25 Stephane Carrez <Stephane.Carrez@worldnet.fr>:Andrew Cagney4-2/+126
* sim-bits.h (_MSB_16, _LSB_16): Define for 16-bit targets. (MASK, LSBIT, MSBIT): Likewise and use _MSB_16 and _LSB_16. (EXTENDED): Define for 16-bit word size. * sim-bits.c (LSEXTRACTED, MSEXTRACTED, LSINSERTED, MSINSERTED, LSSEXT, MSSEXT): Implement for 16-bit word size. * sim-types.h: Added support for 16-bit targets.
2000-07-27* compile.c (decode): Distinguish inc/dec.[wl] and adds/subsAndrew Cagney2-1/+11
correctly.
2000-07-20* m16.igen (break): Call SignalException not sim_engine_halt.Andrew Cagney2-1/+5
2000-07-142000-07-14 Fernando Nasser <fnasser@cygnus.com>Fernando Nasser2-1/+5
* wrapper.c (sim_create_inferior): Fix typo in the previous patch.
2000-07-142000-07-14 Fernando Nasser <fnasser@cygnus.com>Fernando Nasser2-0/+9
* wrapper.c (sim_create_inferior): Reset mode to ARM when creating a new inferior.
2000-07-05Change minimum loop size limit to 0x10 (103792)Nick Clifton2-1/+5
2000-07-04* armvirt.c (ABORTS): Do not define.Alexandre Oliva2-1/+3
2000-07-04* armdefs.h (struct ARMul_State): Add is_StrongARM.Alexandre Oliva5-11/+59
(ARM_Strong_Prop, STRONGARM): Define. * arminit.c (ARMul_NewState): Reset is_StrongARM. (ARMul_SelectProcessor): Set is_StrongARM. * wrapper.c (sim_create_inferior): Use bfd machine type to determine processor type to emulate. * armemu.h (BUSUSEDINCPCS, BUSUSEDINCPCN): Don't increment PC when emulating StrongARM.
2000-07-04* armemu.c (ARMul_Emulate, t_undefined): Proceed to next insn.Alexandre Oliva2-1/+3
2000-07-04* armemu.h (INSN_SIZE): New macro.Alexandre Oliva4-45/+48
(SET_ABORT): Save CPSR in SPSR and set LR. * armemu.c (ARMul_Emulate, isize): Set to INSN_SIZE. (WriteR15, WriteSR15): Do not discard bit 1 in Thumb mode. * arminit.c (ARMul_Abort): Use new SETABORT and INSN_SIZE.
2000-07-04* armemu.c (LoadSMult): Use WriteR15() to discard the leastAlexandre Oliva2-2/+5
significant bits of PC.
2000-07-04* armemu.h (WRITEDESTB): New macro.Alexandre Oliva3-37/+48
* armemu.c (ARMul_Emulate26, bl): Use WriteR15Branch() to modify PC. Moved the existing logic... (WriteR15Branch): ... here. New function. (WriteR15, WriteSR15): Drop the two least significant bits. (LoadSMult): Use WriteR15Branch() to modify PC. (LoadMult): Use WRITEDESTB() instead of WRITEDEST().
2000-07-04* armemu.h (GETSPSR): Call ARMul_GetSPSR().Alexandre Oliva3-4/+18
* armsupp.c (ARMul_CPSRAltered): Zero out bits as they're extracted from state->Cpsr, but preserve the unused bits. (ARMul_GetCPSR): Get bits preserved in state->Cpsr. (ARMul_GetSPSR, ARMul_FixCPSR): Use ARMul_GetCPSR() to get the full CPSR word.
2000-07-04* armemu.h (PSR_FBITS, PSR_SBITS, PSR_XBITS, PSR_CBITS): New.Alexandre Oliva4-30/+40
(SETPSR_F, SETPSR_S, SETPSR_X, SETPSR_C): New macros. (SETPSR, SET_INTMODE, SETCC): Removed. * armsupp.c (ARMul_FixCPSR, ARMul_FixSPSR): Do not test bit mask. Use SETPSR_* to modify PSR. (ARMul_SetCPSR): Load all bits from value. * armemu.c (ARMul_Emulate, msr): Do not test bit mask.
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