Age | Commit message (Collapse) | Author | Files | Lines |
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Do not sign extend immediate for mov imm,XRn.
More random mul, mac & div fixes.
Remove some unused variables.
Sign extend 24bit displacement in memory addresses.
Whee, more fixes.
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Minor fixes in multiply/divide patterns.
start-sanitize-am33
* am33.igen: Fix Z bit for addc Rm,Rn and subc Rm,Rn. Various
fixes to 2 register multiply, divide and mac instructions. Set
Z,N correctly for sat16. Sign extend 24 bit immediate for add,
and sub instructions.
* am33.igen: Add remaining non-DSP instructions.
end-sanitize-am33
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Lots of work still remains. PSW handing is probably broken badly and the
mul/mac classes of instructions are probably not handled correctly.
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This allows the caller to specify extra trace information that is
only evaluated when tracing is enabled.
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simulator.
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(CPU_SCACHE_HASH_MASK): New macro.
(SCACHE_HASH_PC): Rewrite.
* genmloop.sh (engine_resume_{full,fast}): Move some of hash
computation out of main loop.
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* configure.in: AC_SUBST cgen,cgendir. No longer look for guile.
* configure: Regenerate.
* arch.c,arch.h,cpuall.h: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* cpux.c,cpux.h,decodex.c,decodex.h,modelx.c,readx.c: Regenerate.
* semx.c: Regenerate.
* mloopx.in (icount): Moved here from genmloop.sh.
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(CGENDIR,CGEN): New variables.
(CGEN_VERBOSE): Renamed to CGENFLAGS.
(cgen-arch,cgen-cpu,cgen-decode): Update.
(CGEN_CPU_WRITE): New variable.
(CGEN_CPU_SEMSW): -W -> -X.
(CGEN_FLAGS_TO_PASS): Delete SCHEME. Add CGEN,CGENFLAGS.
* cgen.sh: Delete args scheme,schemeflags. New arg cgen.
* cgen-sim.h (RECORD_IADDR): Delete.
* cgen-types.h (HOSTINT,HOSTUINT,HOSTPTR): New types.
* genmloop.sh (engine_resume_{full,fast}): Delete icount.
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Checking in work-to-date.
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* mn10300_sim.h: Add defines for some registers found on the AM33.
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(struct state): Add more room for processor specific registers.
start-sanitize-am33
(REG_E0): Define.
end-sanitize-am33
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(mips_option_handler): Handle OPTION_BRANCH_BUG_4011.
(mips_options): Define the option.
* mips.igen (check_4011_branch_bug): New.
(mark_4011_branch_bug): New.
(all branch insn): Call mark_branch_bug, and check_branch_bug.
* sim-main.h (branchbug4011_option, branchbug4011_last_target,
branchbug4011_last_cia, BRANCHBUG4011_OPTION,
BRANCHBUG4011_LAST_TARGET, BRANCHBUG4011_LAST_CIA,
check_branch_bug, mark_branch_bug): Define.
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--log-file option not used
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* dv-mn103tim.c: Include sim-assert.h
* dv-mn103ser.c (do_polling_event): Check for incoming data on
serial line and schedule next polling event.
(read_status_reg): schedule events to check for incoming data on
serial line and issue interrupt if necessary.
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Testcase errors: two in the former file, one in the latter.
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for, contains an address that differs between -mhard-float and -msoft-float.
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sky-vu.h: use _IOLBF on debug files, _IOFBF on trace files
* sky-gdb.[c|h] (sky_open_file()): add buffer mode to
parameter list
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* interp.c (board): Rename am32 to stdeval1 as this is the name
consistently used to refer to the mn1030002 board.
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* interp.c (sim_open): Fix typo in address of EXTMD register
(0x34000280, not 0x3400280).
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Thu Jun 18 17:48:01 1998 Frank Ch. Eigler <fche@cygnus.com>
* mips.igen (SDC2): Removed R5900 alternative.
* r5900.igen (SQC2): Updated bit pattern to
match changed R5900 specs.
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t-swl.s t-swr.s
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* only outstanding issue is vu0/vu1 to file (phase 3_
* please see ChangeLog.sky for complete details
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* mn10300.igen (syscall): Likewise.
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to check/open the debug trace file
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that there really is only one instance of them.
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* support for the --log, --log-file options
* GIF disassembly
* please view ChangeLog.Sky for details
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* sky-pke.c(read_pke_pcx): return index of current pc
* sky-pke.h: export read_pke_pcx
* interp.c(sim_fetch_registers): read pke pc/pcx
* sky-libvpe.c: track name change from GDB
* sim-main.h: add vif memory based pc
- extend gdb comm area for fifo breakpoints
- define SIM_ENGINE_RESTART_HOOK
* sky-gdb.c: add support for VIF breakpoints
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[ChangeLog]
start-sanitize-tx3904
Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
* dv-tx3904tmr.c: Deschedule timer event after dispatching.
Reduce unnecessarily high timer event frequency.
* dv-tx3904cpu.c: Ditto for interrupt event.
end-sanitize-tx3904
start-sanitize-sky
Tue Jun 16 14:12:09 1998 Frank Ch. Eigler <fche@cygnus.com>
* interp.c (decode_coproc): Removed COP2 branches.
* r5900.igen: Moved COP2 branch instructions here.
* mips.igen: Restricted COPz == COP2 bit pattern to
exclude COP2 branches.
end-sanitize-sky
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Tue Jun 16 09:03:37 1998 Frank Ch. Eigler <fche@cygnus.com>
* t-cop2.s: Reorder instruction blocks to prevent "Out of bounds"
messages during test execution. Added dummy branch labels for BC2*
instructions.
* t-cop2.brn: Use --sky-debug option instead of env var.
* t-cop2.vuexpect: Updated for with new disassembly format.
* sky_sce_fast.exp: Don't compare GIF outputs for
--float-type=fast.
* sce_test{17,33,49}.dvpasm: Use ".DmaPackVif 1" option to
exercise assembler / PKE.
* rw-vureg.c: Cast memcpy operand to allay warning.
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