Age | Commit message (Collapse) | Author | Files | Lines |
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(sim_resume): Fix the handling of exts.w and extu.w.
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* compile.c: Change K&R function definitions to ISO.
(fetch): Make static, and eliminate unused parameter 'n'.
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* mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
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* mips.igen (EI, DI): Remove.
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* README.Cygnus: Rename from this ..
* README: .. to this.
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* s/SWI_TARGET_SWITCHES/SIM_TARGET_SWITCHES/.
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* Makefile.in (tmp-run-multi): Fix mips16 filter.
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Andrew Cagney <ac131313@redhat.com>
Gavin Romig-Koch <gavin@redhat.com>
Graydon Hoare <graydon@redhat.com>
Aldy Hernandez <aldyh@redhat.com>
Dave Brolley <brolley@redhat.com>
Chris Demetriou <cgd@broadcom.com>
* configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
(sim_mach_default): New variable.
(mips64vr-*-*, mips64vrel-*-*): New configurations.
Add a new simulator generator, MULTI.
* configure: Regenerate.
* Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
(multi-run.o): New dependency.
(SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
(tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
(tmp-multi): Combine them.
(BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
(clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
(distclean-extra): New rule.
* sim-main.h: Include bfd.h.
(MIPS_MACH): New macro.
* mips.igen (vr4120, vr5400, vr5500): New models.
(clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
* vr.igen: Replace with new version.
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* configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
* configure: Regenerate.
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* sim-main.h (check_branch_bug, mark_branch_bug): Remove.
* mips.igen: Remove all invocations of check_branch_bug and
mark_branch_bug.
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* inst.h: Likewise.
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* cpu.c,cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Regenerate.
* cpux.c,cpux.h,decodex.c,decodex.h,modelx.c,semx-switch.c: Regenerate.
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* tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
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* simops.c: Use int, 1, 0 instead of boolean, true and false.
* sim-main.h: Ditto.
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* sim-main.h: Only include "idecode.h" once.
* Makefile.in (SIM_EXTRA_DEPS): Define.
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* sim-fpu.c (sim_fpu_inv): Use sim_fpu_div.
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* dv-core.c: Update copyright. sim/common contributed to the FSF.
* dv-glue.c, dv-pal.c, hw-base.c, hw-base.h, hw-device.c: Ditto.
* hw-device.h, hw-handles.c, hw-handles.h: Ditto.
* hw-instances.c, hw-instances.h, hw-properties.c: Ditto.
* hw-properties.h, hw-tree.c, hw-tree.h, sim-alu.h: Ditto.
* sim-basics.h, sim-bits.c, sim-bits.h, sim-config.c: Ditto.
* sim-config.h, sim-core.c, sim-core.h, sim-endian.c: Ditto.
* sim-endian.h, sim-events.c, sim-events.h, sim-inline.c: Ditto.
* sim-inline.h, sim-io.c, sim-io.h, sim-n-bits.h: Ditto.
* sim-n-core.h, sim-n-endian.h, sim-types.h: Ditto.
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* gen.c (name_cmp): Rename format_name_cmp.
(insn_list_insert): When a merge, compare the format name and
instruction name. Add trace messages.
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* filter.c: Re-indent.
* filter.h, filter_host.h, gen-engine.c, gen-engine.h: Ditto.
* gen-icache.c, gen-icache.h, gen-idecode.c: Ditto.
* gen-idecode.h, gen-itable.c, gen-itable.h: Ditto.
* gen-model.c, gen-model.h, gen-semantics.c: Ditto.
* gen-semantics.h, gen-support.c, gen-support.h: Ditto.
* gen.c, gen.h, igen.c, igen.h, ld-cache.c, ld-cache.h: Ditto.
* ld-decode.c, ld-decode.h, ld-insn.c, ld-insn.h, lf.c: Ditto.
* lf.h, misc.c, misc.h, table.c, table.h: Ditto.
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* Makefile.in: Update copyright. IGEN contributed to the FSF.
* filter.c, filter.h, filter_host.c, filter_host.h: Ditto.
* gen-engine.c, gen-engine.h, gen-icache.c, gen-icache.h: Ditto.
* gen-idecode.c, gen-idecode.h, gen-itable.c: Ditto.
* gen-itable.h, gen-model.c, gen-model.h, gen-semantics.c: Ditto.
* gen-semantics.h, gen-support.c, gen-support.h, gen.c: Ditto.
* gen.h, igen.c, igen.h, ld-cache.c, ld-cache.h: Ditto.
* ld-decode.c, ld-decode.h, ld-insn.c, ld-insn.h, lf.c: Ditto.
* lf.h, misc.c, misc.h, table.c, table.h: Ditto.
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2002-11-13 Andrew Cagney <cagney@redhat.com>
* run.c (main): Remove SIM_HAVE_ENVIRONMENT from #endif.
Index: d10v/ChangeLog
2002-11-13 Andrew Cagney <cagney@redhat.com>
* simops.c: Include <string.h>.
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* gen-engine.c (print_engine_issue_prefix_hook): Don't add the
global prefix to ENGINE_ISSUE_PREFIX_HOOK.
(print_engine_issue_postfix_hook): Likewise ENGINE_ISSUE_POSTFIX_HOOK.
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* Make-common.in (SIM_EXTRA_DISTCLEAN): New macro.
(distclean): Depend on it.
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This patch fixes the gcc.dg/nest.c failures for sh-elf.
Fri Oct 11 16:22:28 2002 J"orn Rennecke <joern.rennecke@superh.com>
* interp.c (trap): Return int. Take extra parameter for address
of the trap instruction. Changed all callers.
Add case 33 for profiling.
* gencode.c (trapa): Handle trap 33 using the trap function.
Add read of vector for generic traps.
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* simops.c (OP_E6077E0): And op1 with 7 after reading register, not
before.
(BIT_CHANGE_OP): Likewise.
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* hw_disk.c (hw_disk_init_address): Set device type to "block",
not "disk".
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* simops (OP_10007E0): Don't subtract 4 from PC.
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* Make-common.in (CGEN_READ_SCM): Remove ../../cgen/stamp-cgen.
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sim-main.h (GPR_SET, GPR_CLEAR): Define.
simops.c (OP_24007E0): Sign extend the imm9 operand of a mul instruction.
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* gen-support.c (gen_support_h): Generate
'#define semantic_illegal <PREFIX>_semantic_illegal'.
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* compare_igen_models: New script.
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call being resumed by GDB.
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reset vector and set cpu_use_elf_start to 1 if not found.
(sim_open): Do not set cpu_use_elf_start.
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(sim_prepare_for_program): Use the sim_hw_configure exit code to
return SIM_RC_FAIL.
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bank window to some virtual address to read from extended memory.
(m68hc11cpu_io_write_buffer): Likewise for writing.
(attach_m68hc11_regs): When use_bank property is defined, attached
to the 68HC12 16K memory bank window.
* interp.c (sim_hw_configure): Create memory region for banked
memory.
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* dv-m68hc11.c (m68hc11cpu_ports): Add cpu-write-port input.
(m68hc11cpu_port_event): Handle CPU_WRITE_PORT event.
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when IO mapping changed, not when internal RAM mapping is changed.
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* sim-main.h (M6812_CALL_INDIRECT): Add to enum.
(m6811_regs): Add page register.
(cpu_set_page, cpu_get_page): New macros.
(phys_to_virt): New function.
(cpu_get_indexed_operand_addr, cpu_return): Declare.
* gencode.c: Identify indirect addressing mode for call and fix daa.
(gen_function_entry): New param to tell if src8/dst8 locals are
necessary.
(gen_interpreter): Use it to avoid generation of unused variables.
* interp.c (sim_fetch_register): Allow to read page register; page
register, A, B and CCR are only 1 byte wide.
(sim_store_register): Likewise for writing.
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* mips.igen (do_load_double, do_store_double): New functions.
(LDC1, SDC1): Rename to...
(LDC1b, SDC1b): respectively.
(LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
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