Age | Commit message (Collapse) | Author | Files | Lines |
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../common/aclocal.m4).
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scheme which is more compatible with WinGDB builds.
* configure.in: Improve comment on how to run autoconf.
* configure: Re-run autoconf to get new ../common/aclocal.m4.
* Makefile.in: Use autoconf substitution to install common
makefile fragment.
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into here. Makes insertion into makefiles easier. Also, change
the way that callback.o, gentmap, targ-vals.h, targ-map.c,
targ-map.o, and run are built. They are now built in the
individual simulator directories, taking sources from ../common as
necessary. This replaces the merging of libcommon.a into
linsim.a, which was problematic for the WinGDB build process.
* run.c: Include config.h from . instead of ../common.
* Make-common.in: Remove. It's no longer necessary.
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from common are now built in the individual simualtor directories.
This fixes problems with the WinGDB build procedure.
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was correct!
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Something I noticed while working on the mn10200.
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Something I noticed while working on the mn10200 simulator.
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* gencode.c (build_instruction): Use BigEndianCPU instead of
ByteSwapMem.
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Just something I noticed while working on the mn10200 simulator.
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wingdb's I/O log window.
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array to make gdb implementation easier.
(REG_*): Add definitions for all registers in the state array.
(SEXT32, SEXT40, SEXT44, SEXT60): Remove unused macros.
* simops.c: Related changes.
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and SIGQUIT values.
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(mips16_entry): New static function.
(SignalException): Look for mips16 entry and exit instructions.
(simulate): Use the correct index when setting fpr_state after
doing a pending move.
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both little- and big-endian hosts.
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with gdb/config/i386/xm-windows.h.
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that messes up arithmetic shifts.
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SIGTRAP and SIGQUIT for _WIN32.
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force a 64 bit multiplication.
(build_instruction) [OR]: In mips16 mode, don't do anything if the
destination register is 0, since that is the default mips16 nop
instruction.
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* simops.c: Fix overflow computation for "add" and "inc"
instructions.
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(build_endian_shift): Don't check proc64.
(build_instruction): Always set memval to uword64. Cast op2 to
uword64 when shifting it left in memory instructions. Always use
the same code for stores--don't special case proc64.
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* interp.c (xfer_mem): Change unified memory to 0x0.
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relative operands.
(build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
jal instruction.
* interp.c (simJALDELAYSLOT): Define.
(JALDELAYSLOT): Define.
(INDELAYSLOT, INJALDELAYSLOT): Define.
(simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
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* gencode.c (build_instruction): Use !ByteSwapMem instead of
BigEndianMem.
* interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
(BigEndianMem): Rename to ByteSwapMem and change sense.
(BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
BigEndianMem references to !ByteSwapMem.
(set_endianness): New function, with prototype.
(sim_open): Call set_endianness.
(sim_info): Use simBE instead of BigEndianMem.
(xfer_direct_word, xfer_direct_long, swap_direct_word,
swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
ifdefs, keeping the prototype declaration.
(swap_word): Rewrite correctly.
(ColdReset): Delete references to CONFIG. Delete endianness related
code; moved to set_endianness.
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opcode.
* mn10300_sim.h (simops): Add "format" field.
* interp.c (sim_resume): Deal with endianness issues here.
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Use REG0_4 for indexed loads/stores.
Fixes bugs exposed after minor codegen improvements in the compiler.
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* gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
* interp.c (CHECKHILO): Define away.
(simSIGINT): New macro.
(membank_size): Increase from 1MB to 2MB.
(control_c): New function.
(sim_resume): Rename parameter signal to signal_number. Add local
variable prev. Call signal before and after simulate.
(sim_stop_reason): Add simSIGINT support.
(sim_warning, sim_error, dotrace, SignalException): Define as stdarg
functions always.
(sim_warning): Delete call to SignalException. Do call printf_filtered
if logfh is NULL.
(AddressTranslation): Add #ifdef DEBUG around debugging message and
a call to sim_warning.
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(os_error): New function.
(default_callback): Add os_error.
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simulated.
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values from instructions. Use them consistently.
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(sim_resume): Remove unused variable "opcode".
* simops.c: Fix some uninitialized variable problems, add
parens to fix various -Wall warnings.
Fixing assorted -Wall problems.
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to the OP_* declarations.
(write_template): Similarly for function templates.
* interp.c (insn, extension): Remove global variables. Instead
pass them as arguments to the OP_* functions.
* mn10300_sim.h: Remove decls for "insn" and "extension".
* simops.c (OP_*): Accept "insn" and "extension" as arguments
instead of using globals.
Starting to clean things up.
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Fixes remaining hangs while running c-torture execution tests.
Only 12 c-torture execution failures left:
* 920625-1.c fails all 6 execution tests.
* 960521-1.c fails all 6 execution tests.
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"inc dn" does effect the condition codes.
Just something I noticed.
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"div" instruction.
Fixes another dozen c-torture execution failures.
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