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2013-06-24
Adapt sim to new version number & date locations.
Joel Brobecker
5
-11
/
+51
2013-06-24
sim: bfin: note missing parallel handling of SEARCH
Mike Frysinger
2
-0
/
+18
2013-06-24
sim: bfin: handle invalid HLs encoding in dsp shift insns
Mike Frysinger
2
-5
/
+16
2013-06-24
sim: bfin: run-tests.sh: fix typo in usage exit
Mike Frysinger
2
-1
/
+5
2013-06-24
sim: bfin: se_all32bitopcodes: skip debug insns under the sim
Mike Frysinger
2
-1
/
+18
2013-06-24
sim: bfin: speed up all insn testcases slightly
Mike Frysinger
2
-2
/
+8
2013-06-23
sim: bfin: trim trailing whitespace
Mike Frysinger
2
-1
/
+5
2013-06-21
* msp430: New Directory.
Nick Clifton
17
-0
/
+8534
2013-06-19
sim: bfin: stricter insn decoding
Mike Frysinger
2
-50
/
+86
2013-06-17
sim: bfin: tweak run-tests for parallel usage
Mike Frysinger
2
-6
/
+34
2013-06-17
sim: bfin: add helpful info for generating test tables
Mike Frysinger
2
-0
/
+23
2013-06-17
sim: bfin: drop RET[ENI] setup
Mike Frysinger
2
-3
/
+4
2013-06-17
sim: bfin: add flush/HWERR todo
Mike Frysinger
2
-0
/
+8
2013-06-10
sim: bfin: only regen linux-fixed-code.h in maintainer mode
Mike Frysinger
2
-1
/
+6
2013-06-05
sim: use AM_MAINTAINER_MODE
Mike Frysinger
76
-337
/
+1802
2013-05-15
sim: arm: add support for MOVW and MOVT instructions
Mike Frysinger
4
-4
/
+71
2013-05-13
* v850.igen (LDSR): Accept but ignore a selID parameter.
Nick Clifton
2
-3
/
+9
2013-05-10
gdb
Tom Tromey
20
-10
/
+62
2013-05-06
Move ChangeLog entry from sim/ to sim/ppc/...
Joel Brobecker
2
-4
/
+4
2013-05-03
2013-05-03 Hafiz Abid Qadeer <abidh@codesourcery.com>
Hafiz Abid Qadeer
2
-13
/
+6
2013-04-19
2013-04-19 Nathan Froyd <froydnj@codesourcery.com>
Hafiz Abid Qadeer
2
-0
/
+17
2013-03-31
sim: frv/m32r: back out hard failure when dv-sockser is not available
Mike Frysinger
9
-42
/
+34
2013-03-26
sim: rewrite SIM_AC_OPTION_HARDWARE a bit to simplify things
Mike Frysinger
23
-354
/
+448
2013-03-23
2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
Joel Sherrill
5
-29
/
+34
2013-03-23
2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
Joel Sherrill
12
-8
/
+590
2013-03-23
2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
Joel Sherrill
5
-3
/
+175
2013-03-23
2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
Joel Sherrill
5
-6
/
+60
2013-03-23
2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
Joel Sherrill
2
-2
/
+23
2013-03-15
gdb:
Steve Ellcey
12
-11
/
+25
2013-03-14
Fix erc32 simulator out-of-tree build failure.
Joel Brobecker
2
-1
/
+6
2013-01-28
* simops.c (v850_rotl): New function.
Nick Clifton
6
-0
/
+278
2013-01-17
Remove debug output
Anthony Green
2
-1
/
+4
2013-01-16
* rx.c (decode_opcode): Handle RXO_satr.
Nick Clifton
2
-0
/
+20
2013-01-10
* interp.c (sim_open): Add support for bfd_arch_v850_rh850
Nick Clifton
4
-16
/
+121
2013-01-08
* mem.c (MDBL): Correct value.
Nick Clifton
2
-2
/
+7
2013-01-01
Update years in copyright notice for the GDB files.
Joel Brobecker
539
-585
/
+542
2012-12-20
Revert GPL version change in sim/bfin/aclocal.m4
Joel Brobecker
2
-1
/
+7
2012-12-20
Revert GPL version change in linux-fixed-code.s.
Joel Brobecker
2
-1
/
+6
2012-12-19
Update sim's COPYING files.
Joel Brobecker
4
-580
/
+1256
2012-12-19
[sim] Update old contact info in GPL license notices
Joel Brobecker
256
-523
/
+264
2012-12-19
Update sim copyright headers from GPLv2-or-later to GPLv3-or-later.
Joel Brobecker
169
-170
/
+174
2012-11-20
Fix sim build when configured with --enable-plugins
H.J. Lu
31
-27
/
+225583
2012-11-05
* MAINTAINERS: Update my email address.
Stephane Carrez
2
-1
/
+5
2012-10-03
2012-10-04 Chao-ying Fu <fu@mips.com>
Steve Ellcey
2
-0
/
+16
2012-09-24
Forgot to include ChangeLog in last checkin.
Steve Ellcey
1
-0
/
+6
2012-09-24
2012-09-24 Steve Ellcey <sellcey@mips.com>
Steve Ellcey
3
-3
/
+11
2012-09-13
* v850.igen (W,WWWW): Correct computation of register number.
Nick Clifton
2
-14
/
+19
2012-09-08
Adjust for branch target encoding change
Anthony Green
2
-10
/
+15
2012-09-04
2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
Joel Sherrill
3
-4
/
+7
2012-09-03
PR sim/14540
Nick Clifton
2
-1
/
+7
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