aboutsummaryrefslogtreecommitdiff
path: root/sim
AgeCommit message (Expand)AuthorFilesLines
2011-06-18sim: bfin: add tests for recent dsp fixesMike Frysinger14-0/+2502
2011-06-18sim: bfin: fix M_IH saturation sizeMike Frysinger2-17/+6
2011-06-18sim: bfin: handle V/VS saturation in dsp mac insnsMike Frysinger2-25/+58
2011-06-18sim: bfin: handle the MM flag in M_IU/M_TFU modes with dsp insnsMike Frysinger2-0/+10
2011-06-18sim: bfin: fix sign extension in dsp insns with MM flagMike Frysinger2-8/+10
2011-06-18sim: bfin: fix dsp insns IH saturation/rounding behaviorMike Frysinger2-1/+16
2011-06-18sim: bfin: fix inverted changelog entryMike Frysinger1-1/+1
2011-06-18sim: bfin: fix accumulator edge case saturationMike Frysinger2-2/+7
2011-06-18sim: bfin: use freeargv for freeing argvsMike Frysinger2-1/+5
2011-06-09sim: erc32: ignore --sysroot that gdb passes downMike Frysinger2-0/+7
2011-06-09sim/ppc: Fix check for --sysroot= optionJoel Brobecker2-1/+6
2011-06-09Spelling fixes in ChangeLog.Joel Brobecker1-2/+2
2011-06-08ppc sim: Improve invalid option error messageJoel Brobecker2-2/+13
2011-06-08ppc sim: Allow --sysroot command-line optionJoel Brobecker2-0/+8
2011-06-05sim: bfin: add missing gitignore fileMike Frysinger1-0/+1
2011-06-04sim: bfin: import testsuiteMike Frysinger816-0/+221152
2011-06-04sim: bfin: add support for glued SIC interrupt linesMike Frysinger2-25/+71
2011-06-04sim: bfin: push SIC mappings to device treeMike Frysinger3-589/+723
2011-06-03Spelling fixe in sim/ppc/vm.cJoel Brobecker2-1/+7
2011-06-03Minor spelling fix in ChangeLog.Joel Brobecker1-1/+1
2011-06-03sim: bfin: dma: fix indentationMike Frysinger2-1/+5
2011-06-01Add `sim_complete_command' definition to erc32 simJoel Brobecker2-0/+10
2011-05-27sim: fix minor --sysroot mem leakMike Frysinger2-3/+13
2011-05-26sim: common: add back Blackfin syscallsMike Frysinger2-0/+35
2011-05-26sim: bfin: switch to new syscall trace levelMike Frysinger2-1/+5
2011-05-26sim: add syscall tracing levelMike Frysinger3-1/+30
2011-05-25sim: bfin: move model data into machs.hMike Frysinger31-109/+80
2011-05-25sim: bfin: add a performance monitor stubMike Frysinger7-0/+196
2011-05-25sim: bfin: add bf526-0.2/bf54x-0.4 rom regionsMike Frysinger6-0/+27
2011-05-23sim: glue: allow bitwise devices to only glue intsMike Frysinger2-47/+61
2011-05-23sim: glue: implement or/xor funcsMike Frysinger2-7/+34
2011-05-16sim: tests: support .S/.c filesMike Frysinger2-9/+47
2011-05-14sim: bfin: allow pushing of SPMike Frysinger2-2/+6
2011-05-14sim: bfin: implement loop back support in the UARTsMike Frysinger4-23/+62
2011-05-11sim: fix func call style (space before paren)Mike Frysinger24-241/+250
2011-05-11 PR sim/12737Hans-Peter Nilsson5-0/+11
2011-05-09sim: bfin: fix UART LSR read-only bit saturationMike Frysinger2-0/+6
2011-05-04gdb:Joseph Myers10-9/+29
2011-04-27sim: bfin: constify dmac pmap arraysMike Frysinger2-13/+22
2011-04-26sim: gpio: add output supportMike Frysinger2-16/+53
2011-04-26sim: gpio: update mask a/b signals betterMike Frysinger2-12/+49
2011-04-16sim: add sim_complete_command stubs for non-common-using portsMike Frysinger14-0/+69
2011-04-16sim: bfin: use store buffer with more 32bit insnsMike Frysinger2-23/+37
2011-04-15gdb: sim: add style fixes lost between git->cvsMike Frysinger1-0/+1
2011-04-15gdb: sim: add command line completionMike Frysinger2-0/+56
2011-04-15sim: bfin: handle implicit DISALGNEXCPT with video insnsMike Frysinger2-0/+30
2011-04-11sim: bfin: respect the port level on signals to the SICMike Frysinger2-16/+32
2011-04-11sim: bfin: add missing GPIO pin 15Mike Frysinger2-0/+5
2011-04-02sim: dv-glue: fix up style a bitMike Frysinger2-7/+38
2011-04-02sim: fix up style a bitMike Frysinger14-80/+137
generated by cgit v1.1 at 2024-12-04 06:51:36 +0000