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AgeCommit message (Expand)AuthorFilesLines
2013-06-24sim: bfin: se_all32bitopcodes: skip debug insns under the simMike Frysinger2-1/+18
2013-06-24sim: bfin: speed up all insn testcases slightlyMike Frysinger2-2/+8
2013-06-23sim: bfin: trim trailing whitespaceMike Frysinger2-1/+5
2013-06-21 * msp430: New Directory.Nick Clifton17-0/+8534
2013-06-19sim: bfin: stricter insn decodingMike Frysinger2-50/+86
2013-06-17sim: bfin: tweak run-tests for parallel usageMike Frysinger2-6/+34
2013-06-17sim: bfin: add helpful info for generating test tablesMike Frysinger2-0/+23
2013-06-17sim: bfin: drop RET[ENI] setupMike Frysinger2-3/+4
2013-06-17sim: bfin: add flush/HWERR todoMike Frysinger2-0/+8
2013-06-10sim: bfin: only regen linux-fixed-code.h in maintainer modeMike Frysinger2-1/+6
2013-06-05sim: use AM_MAINTAINER_MODEMike Frysinger76-337/+1802
2013-05-15sim: arm: add support for MOVW and MOVT instructionsMike Frysinger4-4/+71
2013-05-13 * v850.igen (LDSR): Accept but ignore a selID parameter.Nick Clifton2-3/+9
2013-05-10gdbTom Tromey20-10/+62
2013-05-06Move ChangeLog entry from sim/ to sim/ppc/...Joel Brobecker2-4/+4
2013-05-032013-05-03 Hafiz Abid Qadeer <abidh@codesourcery.com>Hafiz Abid Qadeer2-13/+6
2013-04-192013-04-19 Nathan Froyd <froydnj@codesourcery.com>Hafiz Abid Qadeer2-0/+17
2013-03-31sim: frv/m32r: back out hard failure when dv-sockser is not availableMike Frysinger9-42/+34
2013-03-26sim: rewrite SIM_AC_OPTION_HARDWARE a bit to simplify thingsMike Frysinger23-354/+448
2013-03-232013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill5-29/+34
2013-03-232013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill12-8/+590
2013-03-232013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill5-3/+175
2013-03-232013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill5-6/+60
2013-03-232013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill2-2/+23
2013-03-15gdb:Steve Ellcey12-11/+25
2013-03-14Fix erc32 simulator out-of-tree build failure.Joel Brobecker2-1/+6
2013-01-28 * simops.c (v850_rotl): New function.Nick Clifton6-0/+278
2013-01-17Remove debug outputAnthony Green2-1/+4
2013-01-16 * rx.c (decode_opcode): Handle RXO_satr.Nick Clifton2-0/+20
2013-01-10 * interp.c (sim_open): Add support for bfd_arch_v850_rh850Nick Clifton4-16/+121
2013-01-08 * mem.c (MDBL): Correct value.Nick Clifton2-2/+7
2013-01-01Update years in copyright notice for the GDB files.Joel Brobecker539-585/+542
2012-12-20Revert GPL version change in sim/bfin/aclocal.m4Joel Brobecker2-1/+7
2012-12-20Revert GPL version change in linux-fixed-code.s.Joel Brobecker2-1/+6
2012-12-19Update sim's COPYING files.Joel Brobecker4-580/+1256
2012-12-19[sim] Update old contact info in GPL license noticesJoel Brobecker256-523/+264
2012-12-19Update sim copyright headers from GPLv2-or-later to GPLv3-or-later.Joel Brobecker169-170/+174
2012-11-20Fix sim build when configured with --enable-pluginsH.J. Lu31-27/+225583
2012-11-05* MAINTAINERS: Update my email address.Stephane Carrez2-1/+5
2012-10-032012-10-04 Chao-ying Fu <fu@mips.com>Steve Ellcey2-0/+16
2012-09-24Forgot to include ChangeLog in last checkin.Steve Ellcey1-0/+6
2012-09-242012-09-24 Steve Ellcey <sellcey@mips.com>Steve Ellcey3-3/+11
2012-09-13 * v850.igen (W,WWWW): Correct computation of register number.Nick Clifton2-14/+19
2012-09-08Adjust for branch target encoding changeAnthony Green2-10/+15
2012-09-042012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill3-4/+7
2012-09-03 PR sim/14540Nick Clifton2-1/+7
2012-08-30sim: cr16: update syscall listMike Frysinger3-25/+34
2012-08-30sim: cr16: improve trap handlingMike Frysinger4-2/+31
2012-08-30sim: cr16: add sim_complete_command stubMike Frysinger2-0/+9
2012-08-16oops - acxidentally omitted from previous delta.Nick Clifton1-0/+10
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