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AgeCommit message (Expand)AuthorFilesLines
2015-06-11sim: msp430: delete unused trace macrosMike Frysinger2-48/+6
2015-06-11sim: trace: centralize the system tracingMike Frysinger4-17/+14
2015-06-11sim: trace: add STRACE_xxx_P macrosMike Frysinger2-0/+21
2015-06-11sim: trace: use existing defines for the useful maskMike Frysinger2-4/+5
2015-06-11sim: trace: create a common WITH_TRACE_P macroMike Frysinger2-19/+28
2015-06-11sim: frv: drop custom debug maskMike Frysinger2-5/+4
2015-06-11sim: m68hc11: delete unused interrupt_namesMike Frysinger2-8/+4
2015-06-11sim: m68hc11: switch to common sim_resumeMike Frysinger3-77/+7
2015-06-11sim: mn10300: delete unused memory codeMike Frysinger4-62/+19
2015-06-11sim: mn10300: add missing static markingsMike Frysinger2-2/+6
2015-06-11sim: mn10300: delete unused exception/exited/debug stateMike Frysinger4-22/+11
2015-06-11sim: mn10300: use common size typesMike Frysinger2-29/+12
2015-06-11sim: m68hc11/mn10300/v850: delete redundant INLINE definesMike Frysinger7-32/+13
2015-06-11sim: microblaze: switch to common sim_resume/sim_stop_reasonMike Frysinger4-28/+27
2015-06-09Fix latest sim/common/ChangeLog entry.Joel Brobecker1-1/+0
2015-06-09Remove unnecessary empty line in sim/common/ChangeLogJoel Brobecker1-1/+0
2015-06-09Fix spelling mistakes in sim/common/sim-events.c error messages.Mike Stump2-1/+7
2015-05-17sim: erc32: restore attributionMike Frysinger8-7/+33
2015-05-08Switch erc32 simulator copyright headers to FSF.Joel Brobecker11-150/+158
2015-04-30Make RL78 disassembler and simulator respect ISA for mul/divDJ Delorie9-11/+121
2015-04-29Fix problems in the sim sources discovered by running the cppcheck static ana...Nick Clifton8-6/+29
2015-04-27sim: avr: Fix 'multiple definition of sim_{read,write}'Senthil Kumar Selvaraj2-1/+6
2015-04-24Fix typos in sim sources exposed by static analysis.Nick Clifton6-4/+23
2015-04-24Fix typo in check for valid register number in RX sim.Nick Clifton2-1/+6
2015-04-21sim: mcore: clean up printf warningsMike Frysinger2-8/+13
2015-04-21sim: mcore: convert to common memory/verbose functionsMike Frysinger2-319/+59
2015-04-21sim: mcore: drop watchpoint/dumpmem/clearstats supportMike Frysinger2-73/+12
2015-04-21sim: mcore: switch to common syscall handlingMike Frysinger6-140/+64
2015-04-21sim: gennltvals.sh: handle split out newlib source treeMike Frysinger5-17/+32
2015-04-19sim/erc32: Switched emulated memory to host endian order.Jiri Gaisler7-210/+159
2015-04-18sim: clean up duplicate sim-engine hooksMike Frysinger8-37/+17
2015-04-18sim: trim old USING_SIM_BASE_H defineMike Frysinger12-12/+24
2015-04-18sim: unify SIM_CPU definitionMike Frysinger46-57/+96
2015-04-18sim: unify sim_cia definitionMike Frysinger47-54/+101
2015-04-17sim: microblaze: switch to common memory functionsMike Frysinger4-332/+33
2015-04-17sim: replace CIA_{GET,SET} with CPU_PC_{GET,SET}Mike Frysinger64-116/+184
2015-04-17sim: arm/cr16/d10v/h8300/microblaze/sh: fill out sim-cpu pc fetch/store helpersMike Frysinger13-0/+159
2015-04-16sim: avr/mcore/moxie: fill out sim-cpu pc fetch/store helpersMike Frysinger7-1/+80
2015-04-15sim: unify sim-cpu usageMike Frysinger69-139/+126
2015-04-15sim: cris/frv/h8300/iq2000/lm32/m32r/sh64: standardize cpu stateMike Frysinger15-15/+88
2015-04-13sim: ppc: fix up version scriptMike Frysinger2-2/+8
2015-04-13sim: fix the PKGVERSION defineMike Frysinger55-55/+164
2015-04-13sim: options: add --version supportMike Frysinger2-0/+18
2015-04-13sim: switch to gdb version scriptMike Frysinger3-40/+8
2015-04-13sim: mn10300: convert to sim-cpuMike Frysinger4-10/+47
2015-04-13sim: v850: convert to sim-cpuMike Frysinger4-9/+42
2015-04-13sim: mips: convert to sim-cpuMike Frysinger4-11/+44
2015-04-13sim: m68hc11: convert to sim-cpuMike Frysinger4-11/+48
2015-04-13sim: mips: fix prototype warningsMike Frysinger2-63/+43
2015-04-13sim: ft32: fix ft32_pc_get logicMike Frysinger2-1/+5
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