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1998-10-29* sky->devo merge, continued -- left out the r5900 TLB last time!Frank Ch. Eigler2-35/+306
* includes a small PR 17224 tweak
1998-10-29* monster sky->devo merge -- sky sim test suitesFrank Ch. Eigler1-0/+230
1998-10-29* sky->devo merge; dummy test suite directory for mips64el-skyb-elf target.Frank Ch. Eigler1-0/+19
1998-10-29* Fixes for PR 18015, from customer.Frank Ch. Eigler1-0/+7
Thu Oct 29 11:06:30 EST 1998 Frank Ch. Eigler <fche@cygnus.com> * r5900.igen: Fix PSRLVW, MULTU1, PADSBH instructions, as per customer patch.
1998-10-28 * sim-if.c (sim_do_command): Handle "sim info reg {bbpsw,bbpc}".Doug Evans2-152/+72
Bring over from branch.
1998-10-28For cygwin hosts, we need to use the return value from the readDrew Moseley1-0/+24
routine as the number of bytes to process. This apparently is due to text-mode vs binary-mode. If the mounts are done text-mode, then the size returnedby fstat() may be different than the number of bytes "read" in text mode.
1998-10-28Unify (well almost) --enable-build-warnings configuration optionAndrew Cagney8-616/+2303
across GDB and SIM directories.
1998-10-27* Fix for testcase for checking PR 17362.Frank Ch. Eigler2-0/+30
Tue Oct 27 15:20:16 EST 1998 Frank Ch. Eigler <fche@cygnus.com> * t-prot3w.s: Test changed spec of prot3w insn.
1998-10-27* MONSTER sky -> devo mergeFrank Ch. Eigler9-3401/+2148
* ChangeLog / ChangeLog.sky entries were merged with original time stamps; a few were moved between the files
1998-10-19 * sim-main.h: #include cpu-opc.h.Doug Evans2-2/+0
* arch.c,arch.h,decode.c,extract.c,model.c,sem.c: Regenerate to get #include cleanup. * decodex.c,extractx.c,modelx.c: Ditto.
1998-10-19 * Makefile.in (SIM_EXTRA_DEPS): Replace cgen headers withDoug Evans2-37/+45
CGEN_INCLUDE_DEPS. (M32RBF_INCLUDE_DEPS): Define. (m32r .o's): Depend on it. (mloop.c): Update call to genmloop.sh. * cpu.h,cpuall.h: Regenerate. * sim-main.h: Delete inclusion of cpu.h,decode.h, moved to cpuall.h. #include cgen-scache.h,cgen-cpu.h. * tconfig.in (WITH_FOO semantic macros): Delete. * Makefile.in (M32RXF_INCLUDE_DEPS): Define. (m32rx .o's): Depend on it. (mloopx.c): Update call to genmloop.sh. * cpux.h: Regenerate.
1998-10-19 * Make-common.in (CGEN_INCLUDE_DEPS): Define.Doug Evans1-0/+3
(sim-core.o): Delete duplicate dependence on $(SIM_EXTRA_DEPS). (sim-cpu.o,sim-endian.o,sim-hw.o): Ditto. (cgen-run.o,cgen-scache.o,cgen-trace.o,cgen-utils.o): Delete explicit cgen header dependencies, require SIM_EXTRA_DEPS to include CGEN_INCLUDE_DEPS. * cgen-cpu.h: New file. * cgen-engine.h: New file. * cgen-scache.h: New file. * cgen-sim.h: Delete portions moved to new files. * genmloop.sh: Generate two files eng.hin,mloop.cin explicitly, rather than sending result to stdout.
1998-10-10 * interp.c: #include "itable.h" if WITH_IGEN.Doug Evans1-0/+10
(get_insn_name): New function. (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS. * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1998-10-09 Add pseudo-basic-block execution support.Doug Evans8-5612/+1868
* Makefile.in (SIM_OBJS): Add sim-reg.o, cgen-run.o, sim-stop.o. (SIM_EXTRA_DEPS): Add include/opcode/cgen.h. (INCLUDE_DEPS): Delete cpu-sim.h, include/opcode/cgen.h. (mloop.c): Build pseudo-basic-block version. Depend on stamp-cpu. (stamp-decode): Delete, build decode files with other cpu files. * arch.c,arch.h,cpuall.h: Regenerate. * cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate. * sem-switch.c,sem.c: Regenerate. * m32r-sim.h (M32R_MISC_PROFILE): New members load_regs, load_regs_pending. * m32r.c (m32rbf_fetch_register): Renamed from m32rb_fetch_register. (m32rbf_store_register,m32rbf_h_cr_get,m32rbf_h_cr_set, m32rbf_h_psw_get,m32rbf_h_psw_set,m32rbf_h_accum_get, m32rbf_h_accum_set): Likewise. (m32r_model_{init,update}_insn_cycles): Delete. (m32rbf_model_insn_{before,after}): New fns. (m32r_model_record_cti,m32r_model_record_cycles): Delete. (m32rb_model_mark_get_h_gr,m32rb_model_mark_set_h_gr): Delete. (m32rb_model_mark_busy_reg,m32rb_model_mark_unbusy_reg): Delete. (check_load_stall): New fn. (m32rbf_model_m32r_d_u_{exec,cmp,mac,cti,load,store}): New fns. (m32rbf_model_test_u_exec): New fn. * mloop.in: Rewrite, use pbb support. * sim-if.c (sim_stop,sim_sync_stop,sim_resume): Delete. (sim_fetch_register,sim_store_register): Delete. * sim-main.h (CIA_GET,CIA_SET): Fix. (SIM_ENGINE_HALT_HOOK,SIM_ENGINE_RESTART_HOOK): Delete. * tconfig.in (WITH_SCACHE_PBB): Define. (WITH_SCACHE_PBB_M32RBF): Define. * traps.c (sim_engine_invalid_insn): Renamed from ..._illegal_.... (m32r_trap): Pass pc to sim_engine_halt. * configure.in (SIM_AC_OPTION_SCACHE): Change 1024 to 16384. * configure: Regenerate. start-sanitize-m32rx * Makefile.in (M32RX_OBJS): Delete semx.o, add extract.o. (mloopx.c): Build pseudo-basic-block version. Depend on stamp-xcpu. (semx.o): Delete. (extractx.o): Add. (stamp-xdecode): Delete, build decode files with other cpu files. * cpux.c,cpux.h,decodex.c,decodex.h,modelx.c: Regenerate. * readx.c: Delete. * semx.c: Delete. * extractx.c: New file. * semx-switch.c: New file. * m32r-sim.h (BRANCH_NEW_PC): Delete. (SEM_SKIP_INSN): New macro. * m32rx.c (m32rxf_fetch_register): Renamed from m32rx_fetch_register. (m32rxf_store_register,m32rxf_h_cr_get,m32rxf_h_cr_set, m32rxf_h_psw_get,m32rxf_h_psw_set,m32rxf_h_accum_get, m32rxf_h_accum_set,m32rxf_h_accums_get,m32rxf_h_accums_set): Likewise. (m32rxf_model_insn_{before,after}): New fns. (m32rx_model_mark_get_h_gr,m32rx_model_mark_set_h_gr): Delete. (m32rx_model_mark_busy_reg,m32rx_model_mark_unbusy_reg): Delete. (check_load_stall): New fn. (m32rxf_model_m32rx_u_{exec,cmp,mac,cti,load,store}): New fns. * mloopx.in: Rewrite, use pbb support. * tconfig.in (WITH_SCACHE_PBB_M32RXF): Define. (WITH_SEM_SWITCH_FULL): Change from 0 to 1. end-sanitize-m32rx
1998-10-09 * Make-common.in (sim-reg.o): New rule.Doug Evans1-0/+147
(cgen-run.o): New rule. * cgen-ops.h: Delete many BI macros. Change all UBI -> BI. * cgen-run.c (prime_cpu): New function. * cgen-scache.c: Add pseudo-basic-block (pbb) scaching support. (scache_option_handler, case OPTION_PROFILE_SCACHE): Handle explicitly mentioned cpu. (scache_flush_cpu,scache_lookup,scache_lookup_or_alloc): New fns. * cgen-sim.h (CGEN_INSN_VIRTUAL_TYPE): New enum. (CGEN_INSN_VIRTUAL_P): New macro. (SEM_PC): New typedef. (SEMANTIC_FN): Change type of result to SEM_PC. (SEM_SET_FULL_CODE,SEM_SET_FAST_CODE,SEM_SET_CODE): New macros. (IDESC_CTI_P,IDESC_SKIP_P): New macros. (SCACHE_MAP): New typedef. (CPU_SCACHE): Add pbb support. (scace_lookup,scache_lookup_or_alloc,scache_flush_cpu): Declare. (SEM_BRANCH_INIT_EXTRACT,SEM_BRANCH_INIT,SEM_BRANCH_FINI): New macros. (CGEN_CPU): New members running_p,insn_count,{fast,full}_engine_fn, max_slice_insns. (INSN_NAME): Delete. (cgen_insn_name): Declare. (sim_engine_invalid_insn): Renamed from sim_engine_illegal_insn. * cgen-trace.c (trace_buf): Shrink from 1024 to 256 bytes. (first_insn_p): Make static. (trace_insn): Handle virtual insns specially. (cgen_trace_printf): Ensure we haven't overflowed the buffer. * cgen-types.h (UBI): Delete. (MODE_TYPE): New enum. (HOSTINT,HOSTUINT,HOSTPTR): Delete. * cgen-utils.c (mode_names): Delete UBI. Add INT,UINT,PTR. (cgen_virtual_opcode_table): New global. (cgen_insn_name): New function. (sim_disassemble_insn): Ignore virtual insns. * genmloop.sh: Delete top level loop generation. Add pbb support. * sim-cpu.h (CPU_INSN_NAME_FN): New typedef. (sim_cpu_base): New members max_insns,insn_name,model_data. (CPU_PC_GET,CPU_PC_SET): New macros. (sim_pc_get,sim_pc_set): Declare. * sim-model.c (model_set): Call model init fn. * sim-model.h (MODEL_FN): New typedef. (INSN_TIMING): New member model_fn. (MODEL): New members num,init. * sim-profile.c (sim_profile_print_bar): Renamed from print_bar. All callers updated. (profile_insn_init): New fn. (profile_print_insn): Update, INSN_NAME -> CPU_INSN_NAME. Exit early if insn profiling not supported. (profile_print_memory): Update, MAX_MODES -> MODE_TARGET_MAX. (profile_install): Record profile_insn_init as init fn. (profile_uninstall): Free PROFILE_INSN_COUNT if non-null. * sim-profile.h: Update, MAX_MODES -> MODE_TARGET_MAX. (PROFILE_DATA): Delete member exec_time. Change insn_count to pointer to array, rather than the array. (sim_profile_print_bar): Declare.
1998-10-07cgen-run.c: new mainloop for cgenDoug Evans3-0/+256
sim-reg.c: generic sim_fetch/store_register interface fns
1998-09-30Fix PR 17387: ignore auto increment for loads where the destination registerNick Clifton1-0/+10
and the address register are the same.
1998-09-15 * m32r-sim.h (GET_H_SM): New macro.Doug Evans3-21/+146
(UART params): Update to msa2000. * devices.c (device_io_read_buffer): Update to msa2000. * m32r.c (m32rb_h_cr_get,m32rb_h_cr_set): Handle bbpc,bbpsw. (m32rb_h_psw_get,m32rb_h_psw_set): New functions. * arch.c,arch.h,cpu.c,cpu.h,sem-switch.c,sem.c: Regenerate. * m32rx.c (m32rx_h_cr_get,m32rx_h_cr_set): Handle bbpc,bbpsw. (m32rx_h_psw_get,m32rx_h_psw_set): New functions. * cpux.c,cpux.h,readx.c,semx.c: Regenerate. PR 15938.
1998-09-14define SIM_HAVE_BIENDIANNick Clifton1-0/+29
1998-09-10 * r5900.igen (plzcw): Make `i' signed.Doug Evans1-0/+4
PR 17191.
1998-09-09 * m32r-sim.h (m32r_trap): Update prototype.Doug Evans8-994/+1711
* traps.c (m32r_trap): New arg `pc'. * sem.c,sem-switch.c: Regenerated. * cpux.h,readx.c,semx.c: Regenerated.
1998-09-09 * sim/sky/pr17191.s: New file.Doug Evans1-0/+26
* sim/sky/pr17191.brn: New file. * sim/sky/t-macros.inc: New file.
1998-09-09Branch merge for GDB:Ron Unrau1-0/+5
* sim-main.h: track COP0 registers * interp.c (sim_{fetch,store}_register): read/write COP0 registers * sky-gdb.[ch]: add sim pipeorder command
1998-09-08* Patch for PR 17142, brought over from sky branch.Frank Ch. Eigler2-6/+32
Fri Sep 4 10:37:57 1998 Frank Ch. Eigler <fche@cygnus.com> * r5900.igen (mtsab): Correct typo in input register. * sim-main.h (TMP_*): New macros for accessing local 128-bit temporary for multimedia instructions. * r5900.igen (*): Convert most instructions to use new TMP macros to store output result during computation.
1998-09-01* Build fixes for tx39 sim hosted on strange Linux boxen.Frank Ch. Eigler2-22/+63
[common/ChangeLog] Tue Sep 1 15:36:52 1998 Frank Ch. Eigler <fche@cygnus.com> * sim-config.h: Remove reference to linux kernel header. [mips/ChangeLog] Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com> * dv-tx3904sio.c: Include sim-assert.h.
1998-08-26Change sanitization of vrXXXX to cygnus, so redact might work on it.Ken Raeburn1-30/+0
This means using keep-vr4320 without keep-cygnus probably won't work.
1998-08-26Regress yesterday's change to jmp instn implementation in mn10300.igen.Joyce Janczyn1-5/+0
1998-08-26Regress yesterday's change to jmp instruction -- it has deceiving syntax.Joyce Janczyn2-17/+32
Also tidy up some code to match documentation and fix div, divu by 0.
1998-08-25* mn10300.igen (OP_F0F4): Need to load contents of register AN0Joyce Janczyn2-277/+287
for jmp.
1998-08-25* eCos tx3904sio sim - devo part 2/2Frank Ch. Eigler3-17/+614
Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com> * dv-tx3904sio.c: New file: tx3904 serial I/O module. * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target. Reorganize target-specific sim-hardware checks. * configure: rebuilt. * interp.c (sim_open): For tx39 target boards, set OPERATING_ENVIRONMENT, add tx3904sio devices. * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading ROM executables. Install dv-sockser into sim-modules list. * dv-tx3904irc.c: Compiler warning clean-up. * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly frequent hw-trace messages.
1998-08-25* eCos tx3904sio sim - devo part 1/2Frank Ch. Eigler1-0/+377
Tue Aug 25 12:45:27 1998 Frank Ch. Eigler <fche@cygnus.com> * dv-sockser.c (sockser_addr): Make variable non-static.
1998-08-24* sim-main.h (SIM_HANDLES_LMA): Define SIM_HANDLES_LMA.Joyce Janczyn1-0/+14
1998-08-24* sim-hw.{c,h} (sim_hw_parse): Return struct hw pointer.Joyce Janczyn1-0/+13
1998-08-18fix broken sanitizationKen Raeburn1-94/+137
1998-08-12sanitize-vr5400 -> sanitize-cygnus, for 98r2Ken Raeburn2-17/+17
1998-08-06 * sim-main.h: track COP2 register definitions, define VIO_BASERon Unrau1-4/+4
* interp.c (sim_{fetch,store}_register): read/write VU0/1 control regs * sky-gdb.c: use VIO_BASE * sky-pke.h: move GDB_COMM area
1998-08-04 Rename cpu m32r to m32rb to distinguish from architecture name.Doug Evans1-57/+57
* Makefile.in (mloop.c): cpu m32r renamed to m32rb. (stamp-cpu): Ditto. * sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R. * tconfig.in (WANT_CPU_M32RB): Ditto. * m32r.c (WANT_CPU_M32RB): Ditto. (*): m32r_ cpu fns renamed to m32rb_. * sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update. * arch.h,arch.c: Regenerate. * cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate. * sem-switch.c,sem.c: Regenerate. * sim-if.c (sim_open): Don't allocate memory on top of any user specified memory. (h_gr_get,h_gr_set): Delete. * sim-main.h (h_gr_get,h_gr_set): Delete. * traps.c (m32r_trap): Replace calls to h_gr_[gs]et with a_m32r_h_gr_[gs]et.
1998-08-03 * Makefile.in (INCLUDE_DEPS): Add include/opcode/cgen.h.Doug Evans3-117/+41
* sim-if.c (sim_open): Open opcode table. (sim_close): Close it.
1998-08-03 * cgen-sim.h (cgen_state): New member opcode_table.Doug Evans1-1/+8
* cgen-utils.c (sim_disassemble_insn): Use it.
1998-07-31 * sim-main.h: shadow NUM_CORE_REGS from tm-txvu.hRon Unrau3-80/+121
* interp.c: use NUM_CORE_REGS * sky-gdb.c (set_fifo_breakpoints): use VIF interrupt bit for break * sky-pke.c (pke_issue): use interrupt bit for break points
1998-07-31fix sanitizationJeff Holcomb1-1/+1
1998-07-29Fix sanitize misspellings.Jeff Law1-40/+40
1998-07-29Fix incorrect calculation of conditional field when being extractedAndrew Cagney2-1/+15
from a previous decode.
1998-07-28 Add support for new versions of mulwhi,mulwlo,macwhi,macwlo thatDoug Evans2-65/+53
accept an accumulator choice. * cpux.c,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
1998-07-28New testcases for PR 16547 (new instructions added).Doug Evans1-0/+4
1998-07-28Add note about limitations of insn_field_cmp().Andrew Cagney1-3/+6
1998-07-28Problems with conditional instruction-table fields (N!M, N=M, ...).Andrew Cagney2-67/+185
Was restricting `M' to opcode fields in the current word.
1998-07-27 * am33.igen: Detect cases where two operands must not match inJeff Law2-38/+49
non-DSP instructions.
1998-07-25For vr* processors start using vr.igen.Andrew Cagney5-441/+5
Sanitize out README.Cygnus.
1998-07-25Add new file vr.igen which is a merge of vr5400.igen and vr4320.igen.Andrew Cagney3-2/+555
Hack sanitize so that it doesn't sanitize vrXXX when either of keep-vr5400 or keep-vr4320 are specified. Move two basic vr4100 instructions from mips.igen to vr.igen.
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