aboutsummaryrefslogtreecommitdiff
path: root/sim
AgeCommit message (Collapse)AuthorFilesLines
1997-07-29Add test for "mtsa"Andrew Cagney3-0/+16
1997-07-28Handle overflow from signed divide by -1.Andrew Cagney1-5/+24
1997-07-28More checks for pdivuwAndrew Cagney2-0/+18
1997-07-25gencode.c: Two arg MADD should not assign result to /bin/bash.Gavin Romig-Koch2-1/+7
1997-07-25 * configure.in (sparc*-*-*): Don't build erc32.David Edelsohn1-0/+3
* configure: Regenerate.
1997-07-22Keep sim-watch.[ch].David Edelsohn1-0/+2
1997-07-22Don't always keep igen, it's currently only kept if d30v or tic80.David Edelsohn1-1/+0
1997-07-22 * sim-n-core.h (sim_core_write_unaligned_N): Add missing breakDavid Edelsohn1-0/+5
to FORCED_ALIGNMENT case.
1997-07-15Configure r5900 testsuite sub-directory.Andrew Cagney2-1/+38
1997-07-15Similistic configure/build scripts for tx59 simulator tests.Andrew Cagney5-0/+1182
1997-07-15Generic tests for 5900.Andrew Cagney2-0/+40
1997-07-14Standard simulator tests.Andrew Cagney4-0/+65
1997-07-11Tests for mips r5900 instructionsAndrew Cagney56-0/+892
1997-07-11Fix a number of problems in the r5900 specific p* (parallel) instructions.Andrew Cagney3-90/+177
In particular a host endian dependency one fixed resolved most problems.
1997-07-03Sync powerpc simulator with public version. Enable FPSCR and stringAndrew Cagney1-1/+1
instructions.
1997-07-02 * gencode.c (build_instruction): Handle "pext5" according toJeff Law2-1/+4
version 1.95 of the r5900 ISA. Fixes pr12413 (c/h from toshiba).
1997-07-02 * gencode.c (build_instruction): Handle "ppac5" according toJeff Law2-1/+6
version 1.95 of the r5900 ISA. fixes pr12407 (c/h from toshiba).
1997-07-02 * interp.c (sim_engine_run): Reset the ZERO register to zeroJeff Law2-23/+40
regardless of FEATURE_WARN_ZERO.
1997-07-02 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.Jeff Law2-3/+20
Fix for pr12402 (c/h from toshiba).
1997-06-27Add test for dbt/rtd instructionsAndrew Cagney1-0/+38
1997-06-24 * interp.c (sim_resume): Clear State.exited.Jeff Law1-0/+1
(sim_stop_reason): If State.exited is nonzero, then indicate that the simulator exited instead of stopped. * mn10300_sim.h (struct _state): Add exited field. * simops.c (syscall): Set State.exited for SYS_exit. Fixes problem found bin Felix.
1997-06-12 * simops.c: Fix thinko in last change.Jeff Law2-1/+5
1997-06-10 * simops.c: "call" stores the callee saved registers into theJeff Law2-53/+55
stack! Update the stack pointer properly when done with register saves.
1997-06-10 * simops.c: Fix return address computation for "call" instructions.Jeff Law2-2/+10
1997-06-06Open in binary mode when available.Andrew Cagney1-0/+8
1997-06-06Clean up formatting of instruction traces.Andrew Cagney1-0/+33
1997-06-05Verify magic number of simulator struct.Andrew Cagney1-0/+4
1997-06-04Initialize the sim-engine module.Andrew Cagney1-0/+12
1997-06-03o Fixes to repeated watchpointsAndrew Cagney3-110/+228
o Add mips ISA instructions needed to handle interrupts
1997-06-02o Fix padd insnAndrew Cagney1-8/+12
o Take an interrupt when an int event occures.
1997-05-30Add assembler information to igen input files.Andrew Cagney7-153/+309
1997-05-29Fix subu immed - was incorrectly using unsigned.Andrew Cagney3-1/+10
1997-05-29Add a simple dissasembler to igenAndrew Cagney4-38/+740
1997-05-27Fix watching PC for 64bit (mips) target.Andrew Cagney2-42/+146
Stop watchpoints corrupting the event queue.
1997-05-27Extend xor-endian and per-cpu support in core module.Andrew Cagney11-63/+294
Allow negated test when watching value within core.
1997-05-23Preliminary suport for xor-endian suport in core module.Andrew Cagney6-79/+181
1997-05-23Incorrect test for zero-r0 code gen.Andrew Cagney2-2/+12
1997-05-23Enumerate longjmp's return type.Andrew Cagney1-0/+5
1997-05-22ifdef out uses of simSTOP, simSTEP and simBE when DEBUG is defined.Gavin Romig-Koch2-0/+9
1997-05-22Change longjmp param/setjmp return value used for simulator restart from 0 to 2.Gavin Romig-Koch3-6/+27
1997-05-22 * interp.c (sim_resume): Add missing case in big switchJeff Law2-0/+6
statement (for extb instruction).
1997-05-21Watchpoint interface.Andrew Cagney16-817/+1486
1997-05-20 * interp.c: Replace all references to load_mem and store_memJeff Law3-340/+295
with references to load_byte, load_half, load_3_byte, load_word and store_byte, store_half, store_3_byte, store_word. (INLINE): Delete definition. (load_mem_big): Likewise. (max_mem): Make it global. (dispatch): Make this function inline. (load_mem, store_mem): Delete functions. * mn10300_sim.h (INLINE): Define. (RLW): Delete unused definition. (load_mem, store_mem): Delete declarations. (load_mem_big): New definition. (load_byte, load_half, load_3_byte, load_word): New functions. (store_byte, store_half, store_3_byte, store_word): New functions. * simops.c: Replace all references to load_mem and store_mem with references to load_byte, load_half, load_3_byte, load_word and store_byte, store_half, store_3_byte, store_word.
1997-05-20Part II of adding callback argument to sim_open(). Update all theAndrew Cagney7-56/+48
other simulators; remove SIM_DESC from depreciated function sim_set_callbacks().
1997-05-20Depreciate sim_set_callbacks() function. Set simulator callbacksAndrew Cagney3-18/+19
during sim_open().
1997-05-19Make getpid, kill supported system callsMichael Meissner6-39/+157
1997-05-19 * interp.c (dispatch): Make this an inline function.Jeff Law3-7/+10
* simops.c (syscall): Use callback->write regardless of what file descriptor we're writing too.
1997-05-19Graft sim/common event and other code onto the mips simulator.Andrew Cagney5-220/+196
1997-05-19Update.Andrew Cagney1-3/+8
1997-05-19Make simulator event-queue manager a bit more signal safe.Andrew Cagney3-0/+26
generated by cgit v1.1 at 2025-02-02 19:06:54 +0000