Age | Commit message (Collapse) | Author | Files | Lines | |
---|---|---|---|---|---|
1997-09-17 | Clean up more tracing. | Andrew Cagney | 5 | -211/+112 | |
FIX interrupt delivery - was zapping PSW before it had been saved. FIX interrupt return, was one instruction out. | |||||
1997-09-17 | * sim-events.c (ETRACE): Use trace_printf not sim_io_printf for | Andrew Cagney | 1 | -0/+10 | |
trace output. * sim-core.c (sim_core_signal): When bad access halt simulator SIGSEGV / SIGBUS instead of aborting. (signal.h): Include. * sim-watch.c (sim_watchpoint_install): Handler for watchpoint options was missing. | |||||
1997-09-17 | Fix tracing for: "ctret", "bsw", "hsw" | Andrew Cagney | 4 | -144/+140 | |
Fix bugs in: "bsh", "callt", "stsr". | |||||
1997-09-17 | Define MOVED macro, move sub-bitfield from XXX to YYY. | Andrew Cagney | 1 | -0/+4 | |
1997-09-17 | More v850 simulator tests. | Andrew Cagney | 8 | -8/+62 | |
1997-09-17 | More v850 simulator tests. | Andrew Cagney | 12 | -23/+1114 | |
1997-09-17 | Add/test 8bit bit manipuation macros. | Andrew Cagney | 2 | -32/+71 | |
Test LS and MS versions of SEXT macro. Simplify/test macro returning a single bit. | |||||
1997-09-16 | Generic rules for building simple simulator test programs. | Andrew Cagney | 1 | -0/+48 | |
1997-09-16 | * sim/mips/gencode.c (build_instruction): Don't need to subtract 4 for | Gavin Romig-Koch | 2 | -1/+7 | |
JALR, just 2. | |||||
1997-09-16 | * sim/mips/interp.c: Correct some HASFPU problems. | Gavin Romig-Koch | 2 | -5/+19 | |
1997-09-16 | Smooth some of ALU tracing's rough edges. | Andrew Cagney | 5 | -277/+292 | |
Fix switch insn. | |||||
1997-09-16 | More sim-bits testing. | Andrew Cagney | 2 | -4/+37 | |
1997-09-16 | Add {LS,MS}SEXT and {LS,MS}INSERTED macros. Eliminates bug in SEXT. | Andrew Cagney | 3 | -25/+107 | |
1997-09-16 | Use trace_one_insn in trace functions. Buffer up trace data so that | Andrew Cagney | 3 | -164/+133 | |
it is displayed in a single block. | |||||
1997-09-16 | v850eq simulator tests. | Andrew Cagney | 6 | -0/+132 | |
1997-09-16 | Restrict ldsr (load system register) to modifying just non-reserved PSW bits. | Andrew Cagney | 5 | -59/+55 | |
For v850eq, include PSW[US] in bits that can be modified. | |||||
1997-09-16 | Add v850e version of breakpoint instruction. | Andrew Cagney | 4 | -5/+34 | |
1997-09-16 | Differentiate between a non-zero string and a constant zero field. | Andrew Cagney | 1 | -0/+5 | |
1997-09-16 | * simops.c (Multiply64): Don't store into register zero. | Jim Wilson | 2 | -2/+11 | |
1997-09-15 | For instructions moved into v850.igen was computing (wrong) NIA when | Andrew Cagney | 4 | -14/+28 | |
this wasn't needed. | |||||
1997-09-15 | * igen.c (gen_run_c): Handle non-multi-sim case. | Andrew Cagney | 2 | -22/+36 | |
1997-09-15 | Fix sanitization for v850 V v850e V v850eq | Andrew Cagney | 5 | -429/+506 | |
1997-09-15 | Update to reflect change to sim/common/aclocal.m4 (allow sim/common | Andrew Cagney | 9 | -26/+55 | |
directory to specify its own unqiue config.h file). | |||||
1997-09-15 | For v850eq start up with US bit set. | Andrew Cagney | 6 | -333/+244 | |
Let sim_analyze_program determine the architecture. Fix various sanitizations. | |||||
1997-09-15 | Determine ARCHITECTURE from program if possible. | Andrew Cagney | 2 | -2/+14 | |
Rename common's generated config.h to cconfig.h. | |||||
1997-09-15 | * callback.c (os_write): divert stdout and stderr to their | Andrew Cagney | 1 | -0/+5 | |
respective hooks. | |||||
1997-09-12 | Check reserved bits before executing instructions. | Andrew Cagney | 7 | -43/+144 | |
Make v850[eq] the the default simulator. Report illegal instructions. Include v850e instructions in v850eq. | |||||
1997-09-12 | v850eq wasn't building igen directory. | Andrew Cagney | 3 | -0/+9 | |
1997-09-12 | Add profiling support to v850*. | Andrew Cagney | 6 | -16/+83 | |
1997-09-12 | Short form of sample-size option had wrong value. | Andrew Cagney | 2 | -1/+6 | |
1997-09-12 | v850* wants igen | Andrew Cagney | 1 | -0/+8 | |
1997-09-12 | Generate instruction profile call with each instruction. | Andrew Cagney | 1 | -0/+6 | |
1997-09-11 | Wed Sep 10 22:30:24 1997 Martin M. Hunt <hunt@cygnus.com> | Martin Hunt | 1 | -0/+7 | |
* interp.c (sim_resume): Increment PC at end of rep loop. * simops.c (OP_4201): Fix rachi instruction. | |||||
1997-09-10 | mips/sim_info was just returning????? | Andrew Cagney | 2 | -2/+4 | |
1997-09-10 | o Wordwrap usage messages from sim-options | Andrew Cagney | 5 | -17/+81 | |
o Clarify how to use alias options o use in sim-watch (better usage message) o Don't pass something on the stack into the watch-point interrupt hander. | |||||
1997-09-10 | (gen_itable_h): Output an enum defining the max size of the itable | Andrew Cagney | 1 | -0/+7 | |
string members. | |||||
1997-09-10 | Have trace_input, trace_output use sim-trace for IO. | Andrew Cagney | 2 | -47/+66 | |
1997-09-10 | * inst.h (sim_state): rename to h8300_sim_state, to avoid conflict | Felix Lee | 3 | -2/+13 | |
with sim/common. * configure.in: check for sys/param.h * compile.c: #ifdef HAVE_SYS_PARAM_H. #define SIGTRAP for wingdb. (sim_resume): poll keyboard at least once per call. (sim_resume): use host_callback instead of printf for syscall output. | |||||
1997-09-10 | Add option architecture-info to list supported architectures. | Andrew Cagney | 2 | -0/+26 | |
1997-09-10 | Support tx19 sanitation. | Gavin Romig-Koch | 1 | -0/+30 | |
1997-09-10 | * sim-core.h (sim_cpu_core): [WITH_XOR_ENDIAN + 1], to avoid | Felix Lee | 2 | -1/+7 | |
illegal zero-sized array. * sim-core.c (sim_core_xor_read_buffer): same. | |||||
1997-09-10 | * interp.c (sim_resume): poll_quit() at least once per call; | Felix Lee | 1 | -0/+5 | |
otherwise gdb can loop sim_resume() uninterruptably. | |||||
1997-09-09 | * nltvals.def: Regenerate. | David Edelsohn | 1 | -0/+4 | |
1997-09-09 | Better word error messages. | Andrew Cagney | 2 | -2/+7 | |
1997-09-09 | Remove GCC specific `0x...LL', replace with SIGNED64 (0x...). | Andrew Cagney | 2 | -14/+17 | |
1997-09-09 | Add basic tests for d10v-elf simulator. | Andrew Cagney | 2 | -0/+14 | |
1997-09-08 | Add multi-sim support to v850/v850e/v850eq simulators. | Andrew Cagney | 8 | -483/+1625 | |
1997-09-08 | Add multi-sim support to simulator. | Andrew Cagney | 6 | -799/+3243 | |
1997-09-08 | Use updated MSMASK, MSMASKED macros. | Andrew Cagney | 3 | -10/+10 | |
Fix sat problem in d30v. | |||||
1997-09-08 | Check MS* macros from sim/common. | Andrew Cagney | 2 | -0/+574 | |