Age | Commit message (Collapse) | Author | Files | Lines |
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Update testsuite.
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(extract.o): Delete.
(stamp-arch): Depend on $(CGEN_ARCH_SCM).
(stamp-cpu): Don't build extract.c.
* cpu.c,cpu.h,decode.c,decode.h,sem-switch.c,sem.c: Rebuild.
* mloop.in (extract16): Update type of `insn' arg.
Delete call to d->extract.
(extract32): Ditto.
* Makefile.in (M32RX_OBJS): Delete extractx.o.
(extractx.o): Delete.
(stamp-xcpu): Don't build extractx.c.
* cpux.c,cpux.h,decodex.c,decodex.h,semx-switch.c: Rebuild.
* mloopx.in (extractx16): Update type of `insn' arg.
Delete call to d->extract. Delete arg pbb_p. All callers updated.
(extract-simple,full-exec-simple,fast-exec-simple): Delete.
(extractx32): Ditto.
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(CGEN_ARCH_SCM): New variable.
* cgen-engine.h (EXTRACT_[ML]SB0_{INT,UINT}): New macros.
(EXTRACT_INT,EXTRACT_UINT): New macros.
(SEM_SEM_ARG): New macro.
(SEM_NEXT_VPC): New arg `pc'.
* cgen-sim.h (EXTRACT_SIGNED,EXTRACT_UNSIGNED): Delete.
(sim_disassemble_insn): Update prototype.
* cgen-trace.c (current_insn,insn_fields): New static locals.
(trace_insn): Set them.
* cgen-utils.scm: #include cgen-engine.h.
(sim_disassemble_insn): New arg insn_fields.
Handle variable length insns.
* genmloop.sh: Only emit pbb decls if -pbb.
(${cpu}_scache_lookup): New arg `vpc'.
(scache support): Fetch pc before entering loop.
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* nltvals.def: Rebuild.
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(when available).
Update sim-bits and sim-alu tests in sim/testsuite/common.
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[ChangeLog]
start-sanitize-gxsim
1998-11-13 Frank Ch. Eigler <fche@elastic.org>
* configure.in: Added "--enable-sim-gx" option.
* configure: Regenerated.
end-sanitize-gxsim
[common/ChangeLog]
1998-11-13 Frank Ch. Eigler <fche@elastic.org>
start-sanitize-gxsim
* Make-common.im: Build sim-gx.o and sim-gx-run.o.
* sim-gx.c: New file: target-independent gx routines.
* sim-gx.h: Declarations for gx structs and routines.
* sim-gx-run.c: New file: target-independent gx driver.
* sim-base.h: Add gx block vector to state struct.
end-sanitize-gxsim
* aclocal.m4: Add tests for dlopen family.
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1998-11-12 Frank Ch. Eigler <fche@cygnus.com>
* br-djsr.S: New test for new R62-update timing.
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Fix numerous problems with PENDING_* code.
In old gencode simulator, don't double tick each cycle.
Add BREAK instruction to MIPS16 gencode simulator.
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[d30v/ChangeLog]
1998-11-06 Frank Ch. Eigler <fche@cygnus.com>
* d30v-insns (do_mvfacc): Use loop to limit shift count to 63 .. 0.
[testsuite/d30v-elf/ChangeLog]
1998-11-06 Frank Ch. Eigler <fche@cygnus.com>
* do-shifts.S: Add test for large mvfacc shifts.
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* configure.in: Added case for fr30-*-*.
* configure: Regenerated.
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Thu Nov 5 10:37:40 EST 1998 Frank Ch. Eigler <fche@cygnus.com>
* t-prot3w.s: Correct test of prot3w insn.
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Thu Nov 5 10:29:42 EST 1998 Frank Ch. Eigler <fche@cygnus.com>
* r5900.igen (r59fp_opdiv): Correct erroneous FGR[FD] reference.
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Fix RSQRT.S instruction, add test case.
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before cgen-types.h.
* tconfig.in: Guard against multiple inclusion.
* cpu.h: Delete decls moved to genmloop.sh.
* cpux.h: Ditto.
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HAVE_PARALLEL_INSNS, define as 0 or 1. Emit decls of fns in mloop.cin.
* cgen-engine.h: Typedefs of IADDR,CIA,SEM_ARG,SEM_PC moved ...
* cgen-sim.h: ... to here.
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* dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
interrupt level number to match changed SignalExceptionInterrupt
macro.
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- remove memories of old sim/testsuite/sky directory
- add new dir sim/testsuite/mips64el-elf to "always-keep" list
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host, if necessary. for unix-driven win32 testing.
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Thu Oct 29 12:07:06 1998 Frank Ch. Eigler <fche@cygnus.com>
* t-psrlvw.s (test_psrlvw): Add test for sign-extension in insn.
* t-padsbh.s: New test.
* t-mult1.s: New test.
* Makefile.in: Run them.
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* includes a small PR 17224 tweak
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Thu Oct 29 11:06:30 EST 1998 Frank Ch. Eigler <fche@cygnus.com>
* r5900.igen: Fix PSRLVW, MULTU1, PADSBH instructions,
as per customer patch.
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Bring over from branch.
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routine as the number of bytes to process. This apparently is due to
text-mode vs binary-mode. If the mounts are done text-mode, then the
size returnedby fstat() may be different than the number of bytes
"read" in text mode.
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across GDB and SIM directories.
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Tue Oct 27 15:20:16 EST 1998 Frank Ch. Eigler <fche@cygnus.com>
* t-prot3w.s: Test changed spec of prot3w insn.
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* ChangeLog / ChangeLog.sky entries were merged with original time stamps;
a few were moved between the files
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* arch.c,arch.h,decode.c,extract.c,model.c,sem.c: Regenerate
to get #include cleanup.
* decodex.c,extractx.c,modelx.c: Ditto.
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CGEN_INCLUDE_DEPS.
(M32RBF_INCLUDE_DEPS): Define.
(m32r .o's): Depend on it.
(mloop.c): Update call to genmloop.sh.
* cpu.h,cpuall.h: Regenerate.
* sim-main.h: Delete inclusion of cpu.h,decode.h, moved to cpuall.h.
#include cgen-scache.h,cgen-cpu.h.
* tconfig.in (WITH_FOO semantic macros): Delete.
* Makefile.in (M32RXF_INCLUDE_DEPS): Define.
(m32rx .o's): Depend on it.
(mloopx.c): Update call to genmloop.sh.
* cpux.h: Regenerate.
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(sim-core.o): Delete duplicate dependence on $(SIM_EXTRA_DEPS).
(sim-cpu.o,sim-endian.o,sim-hw.o): Ditto.
(cgen-run.o,cgen-scache.o,cgen-trace.o,cgen-utils.o): Delete
explicit cgen header dependencies, require SIM_EXTRA_DEPS to include
CGEN_INCLUDE_DEPS.
* cgen-cpu.h: New file.
* cgen-engine.h: New file.
* cgen-scache.h: New file.
* cgen-sim.h: Delete portions moved to new files.
* genmloop.sh: Generate two files eng.hin,mloop.cin explicitly,
rather than sending result to stdout.
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(get_insn_name): New function.
(sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
* sim-main.h (MAX_INSNS,INSN_NAME): Delete.
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* Makefile.in (SIM_OBJS): Add sim-reg.o, cgen-run.o, sim-stop.o.
(SIM_EXTRA_DEPS): Add include/opcode/cgen.h.
(INCLUDE_DEPS): Delete cpu-sim.h, include/opcode/cgen.h.
(mloop.c): Build pseudo-basic-block version. Depend on stamp-cpu.
(stamp-decode): Delete, build decode files with other cpu files.
* arch.c,arch.h,cpuall.h: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* m32r-sim.h (M32R_MISC_PROFILE): New members load_regs,
load_regs_pending.
* m32r.c (m32rbf_fetch_register): Renamed from m32rb_fetch_register.
(m32rbf_store_register,m32rbf_h_cr_get,m32rbf_h_cr_set,
m32rbf_h_psw_get,m32rbf_h_psw_set,m32rbf_h_accum_get,
m32rbf_h_accum_set): Likewise.
(m32r_model_{init,update}_insn_cycles): Delete.
(m32rbf_model_insn_{before,after}): New fns.
(m32r_model_record_cti,m32r_model_record_cycles): Delete.
(m32rb_model_mark_get_h_gr,m32rb_model_mark_set_h_gr): Delete.
(m32rb_model_mark_busy_reg,m32rb_model_mark_unbusy_reg): Delete.
(check_load_stall): New fn.
(m32rbf_model_m32r_d_u_{exec,cmp,mac,cti,load,store}): New fns.
(m32rbf_model_test_u_exec): New fn.
* mloop.in: Rewrite, use pbb support.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Delete.
(sim_fetch_register,sim_store_register): Delete.
* sim-main.h (CIA_GET,CIA_SET): Fix.
(SIM_ENGINE_HALT_HOOK,SIM_ENGINE_RESTART_HOOK): Delete.
* tconfig.in (WITH_SCACHE_PBB): Define.
(WITH_SCACHE_PBB_M32RBF): Define.
* traps.c (sim_engine_invalid_insn): Renamed from ..._illegal_....
(m32r_trap): Pass pc to sim_engine_halt.
* configure.in (SIM_AC_OPTION_SCACHE): Change 1024 to 16384.
* configure: Regenerate.
start-sanitize-m32rx
* Makefile.in (M32RX_OBJS): Delete semx.o, add extract.o.
(mloopx.c): Build pseudo-basic-block version. Depend on stamp-xcpu.
(semx.o): Delete.
(extractx.o): Add.
(stamp-xdecode): Delete, build decode files with other cpu files.
* cpux.c,cpux.h,decodex.c,decodex.h,modelx.c: Regenerate.
* readx.c: Delete.
* semx.c: Delete.
* extractx.c: New file.
* semx-switch.c: New file.
* m32r-sim.h (BRANCH_NEW_PC): Delete.
(SEM_SKIP_INSN): New macro.
* m32rx.c (m32rxf_fetch_register): Renamed from m32rx_fetch_register.
(m32rxf_store_register,m32rxf_h_cr_get,m32rxf_h_cr_set,
m32rxf_h_psw_get,m32rxf_h_psw_set,m32rxf_h_accum_get,
m32rxf_h_accum_set,m32rxf_h_accums_get,m32rxf_h_accums_set): Likewise.
(m32rxf_model_insn_{before,after}): New fns.
(m32rx_model_mark_get_h_gr,m32rx_model_mark_set_h_gr): Delete.
(m32rx_model_mark_busy_reg,m32rx_model_mark_unbusy_reg): Delete.
(check_load_stall): New fn.
(m32rxf_model_m32rx_u_{exec,cmp,mac,cti,load,store}): New fns.
* mloopx.in: Rewrite, use pbb support.
* tconfig.in (WITH_SCACHE_PBB_M32RXF): Define.
(WITH_SEM_SWITCH_FULL): Change from 0 to 1.
end-sanitize-m32rx
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(cgen-run.o): New rule.
* cgen-ops.h: Delete many BI macros. Change all UBI -> BI.
* cgen-run.c (prime_cpu): New function.
* cgen-scache.c: Add pseudo-basic-block (pbb) scaching support.
(scache_option_handler, case OPTION_PROFILE_SCACHE): Handle explicitly
mentioned cpu.
(scache_flush_cpu,scache_lookup,scache_lookup_or_alloc): New fns.
* cgen-sim.h (CGEN_INSN_VIRTUAL_TYPE): New enum.
(CGEN_INSN_VIRTUAL_P): New macro.
(SEM_PC): New typedef.
(SEMANTIC_FN): Change type of result to SEM_PC.
(SEM_SET_FULL_CODE,SEM_SET_FAST_CODE,SEM_SET_CODE): New macros.
(IDESC_CTI_P,IDESC_SKIP_P): New macros.
(SCACHE_MAP): New typedef.
(CPU_SCACHE): Add pbb support.
(scace_lookup,scache_lookup_or_alloc,scache_flush_cpu): Declare.
(SEM_BRANCH_INIT_EXTRACT,SEM_BRANCH_INIT,SEM_BRANCH_FINI): New macros.
(CGEN_CPU): New members running_p,insn_count,{fast,full}_engine_fn,
max_slice_insns.
(INSN_NAME): Delete.
(cgen_insn_name): Declare.
(sim_engine_invalid_insn): Renamed from sim_engine_illegal_insn.
* cgen-trace.c (trace_buf): Shrink from 1024 to 256 bytes.
(first_insn_p): Make static.
(trace_insn): Handle virtual insns specially.
(cgen_trace_printf): Ensure we haven't overflowed the buffer.
* cgen-types.h (UBI): Delete.
(MODE_TYPE): New enum.
(HOSTINT,HOSTUINT,HOSTPTR): Delete.
* cgen-utils.c (mode_names): Delete UBI. Add INT,UINT,PTR.
(cgen_virtual_opcode_table): New global.
(cgen_insn_name): New function.
(sim_disassemble_insn): Ignore virtual insns.
* genmloop.sh: Delete top level loop generation. Add pbb support.
* sim-cpu.h (CPU_INSN_NAME_FN): New typedef.
(sim_cpu_base): New members max_insns,insn_name,model_data.
(CPU_PC_GET,CPU_PC_SET): New macros.
(sim_pc_get,sim_pc_set): Declare.
* sim-model.c (model_set): Call model init fn.
* sim-model.h (MODEL_FN): New typedef.
(INSN_TIMING): New member model_fn.
(MODEL): New members num,init.
* sim-profile.c (sim_profile_print_bar): Renamed from print_bar.
All callers updated.
(profile_insn_init): New fn.
(profile_print_insn): Update, INSN_NAME -> CPU_INSN_NAME.
Exit early if insn profiling not supported.
(profile_print_memory): Update, MAX_MODES -> MODE_TARGET_MAX.
(profile_install): Record profile_insn_init as init fn.
(profile_uninstall): Free PROFILE_INSN_COUNT if non-null.
* sim-profile.h: Update, MAX_MODES -> MODE_TARGET_MAX.
(PROFILE_DATA): Delete member exec_time.
Change insn_count to pointer to array, rather than the array.
(sim_profile_print_bar): Declare.
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sim-reg.c: generic sim_fetch/store_register interface fns
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and the address register are the same.
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(UART params): Update to msa2000.
* devices.c (device_io_read_buffer): Update to msa2000.
* m32r.c (m32rb_h_cr_get,m32rb_h_cr_set): Handle bbpc,bbpsw.
(m32rb_h_psw_get,m32rb_h_psw_set): New functions.
* arch.c,arch.h,cpu.c,cpu.h,sem-switch.c,sem.c: Regenerate.
* m32rx.c (m32rx_h_cr_get,m32rx_h_cr_set): Handle bbpc,bbpsw.
(m32rx_h_psw_get,m32rx_h_psw_set): New functions.
* cpux.c,cpux.h,readx.c,semx.c: Regenerate.
PR 15938.
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PR 17191.
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* traps.c (m32r_trap): New arg `pc'.
* sem.c,sem-switch.c: Regenerated.
* cpux.h,readx.c,semx.c: Regenerated.
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