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1998-09-15 * m32r-sim.h (GET_H_SM): New macro.Doug Evans3-21/+146
(UART params): Update to msa2000. * devices.c (device_io_read_buffer): Update to msa2000. * m32r.c (m32rb_h_cr_get,m32rb_h_cr_set): Handle bbpc,bbpsw. (m32rb_h_psw_get,m32rb_h_psw_set): New functions. * arch.c,arch.h,cpu.c,cpu.h,sem-switch.c,sem.c: Regenerate. * m32rx.c (m32rx_h_cr_get,m32rx_h_cr_set): Handle bbpc,bbpsw. (m32rx_h_psw_get,m32rx_h_psw_set): New functions. * cpux.c,cpux.h,readx.c,semx.c: Regenerate. PR 15938.
1998-09-14define SIM_HAVE_BIENDIANNick Clifton1-0/+29
1998-09-10 * r5900.igen (plzcw): Make `i' signed.Doug Evans1-0/+4
PR 17191.
1998-09-09 * m32r-sim.h (m32r_trap): Update prototype.Doug Evans8-994/+1711
* traps.c (m32r_trap): New arg `pc'. * sem.c,sem-switch.c: Regenerated. * cpux.h,readx.c,semx.c: Regenerated.
1998-09-09 * sim/sky/pr17191.s: New file.Doug Evans1-0/+26
* sim/sky/pr17191.brn: New file. * sim/sky/t-macros.inc: New file.
1998-09-09Branch merge for GDB:Ron Unrau1-0/+5
* sim-main.h: track COP0 registers * interp.c (sim_{fetch,store}_register): read/write COP0 registers * sky-gdb.[ch]: add sim pipeorder command
1998-09-08* Patch for PR 17142, brought over from sky branch.Frank Ch. Eigler2-6/+32
Fri Sep 4 10:37:57 1998 Frank Ch. Eigler <fche@cygnus.com> * r5900.igen (mtsab): Correct typo in input register. * sim-main.h (TMP_*): New macros for accessing local 128-bit temporary for multimedia instructions. * r5900.igen (*): Convert most instructions to use new TMP macros to store output result during computation.
1998-09-01* Build fixes for tx39 sim hosted on strange Linux boxen.Frank Ch. Eigler2-22/+63
[common/ChangeLog] Tue Sep 1 15:36:52 1998 Frank Ch. Eigler <fche@cygnus.com> * sim-config.h: Remove reference to linux kernel header. [mips/ChangeLog] Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com> * dv-tx3904sio.c: Include sim-assert.h.
1998-08-26Change sanitization of vrXXXX to cygnus, so redact might work on it.Ken Raeburn1-30/+0
This means using keep-vr4320 without keep-cygnus probably won't work.
1998-08-26Regress yesterday's change to jmp instn implementation in mn10300.igen.Joyce Janczyn1-5/+0
1998-08-26Regress yesterday's change to jmp instruction -- it has deceiving syntax.Joyce Janczyn2-17/+32
Also tidy up some code to match documentation and fix div, divu by 0.
1998-08-25* mn10300.igen (OP_F0F4): Need to load contents of register AN0Joyce Janczyn2-277/+287
for jmp.
1998-08-25* eCos tx3904sio sim - devo part 2/2Frank Ch. Eigler3-17/+614
Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com> * dv-tx3904sio.c: New file: tx3904 serial I/O module. * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target. Reorganize target-specific sim-hardware checks. * configure: rebuilt. * interp.c (sim_open): For tx39 target boards, set OPERATING_ENVIRONMENT, add tx3904sio devices. * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading ROM executables. Install dv-sockser into sim-modules list. * dv-tx3904irc.c: Compiler warning clean-up. * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly frequent hw-trace messages.
1998-08-25* eCos tx3904sio sim - devo part 1/2Frank Ch. Eigler1-0/+377
Tue Aug 25 12:45:27 1998 Frank Ch. Eigler <fche@cygnus.com> * dv-sockser.c (sockser_addr): Make variable non-static.
1998-08-24* sim-main.h (SIM_HANDLES_LMA): Define SIM_HANDLES_LMA.Joyce Janczyn1-0/+14
1998-08-24* sim-hw.{c,h} (sim_hw_parse): Return struct hw pointer.Joyce Janczyn1-0/+13
1998-08-18fix broken sanitizationKen Raeburn1-94/+137
1998-08-12sanitize-vr5400 -> sanitize-cygnus, for 98r2Ken Raeburn2-17/+17
1998-08-06 * sim-main.h: track COP2 register definitions, define VIO_BASERon Unrau1-4/+4
* interp.c (sim_{fetch,store}_register): read/write VU0/1 control regs * sky-gdb.c: use VIO_BASE * sky-pke.h: move GDB_COMM area
1998-08-04 Rename cpu m32r to m32rb to distinguish from architecture name.Doug Evans1-57/+57
* Makefile.in (mloop.c): cpu m32r renamed to m32rb. (stamp-cpu): Ditto. * sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R. * tconfig.in (WANT_CPU_M32RB): Ditto. * m32r.c (WANT_CPU_M32RB): Ditto. (*): m32r_ cpu fns renamed to m32rb_. * sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update. * arch.h,arch.c: Regenerate. * cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate. * sem-switch.c,sem.c: Regenerate. * sim-if.c (sim_open): Don't allocate memory on top of any user specified memory. (h_gr_get,h_gr_set): Delete. * sim-main.h (h_gr_get,h_gr_set): Delete. * traps.c (m32r_trap): Replace calls to h_gr_[gs]et with a_m32r_h_gr_[gs]et.
1998-08-03 * Makefile.in (INCLUDE_DEPS): Add include/opcode/cgen.h.Doug Evans3-117/+41
* sim-if.c (sim_open): Open opcode table. (sim_close): Close it.
1998-08-03 * cgen-sim.h (cgen_state): New member opcode_table.Doug Evans1-1/+8
* cgen-utils.c (sim_disassemble_insn): Use it.
1998-07-31 * sim-main.h: shadow NUM_CORE_REGS from tm-txvu.hRon Unrau3-80/+121
* interp.c: use NUM_CORE_REGS * sky-gdb.c (set_fifo_breakpoints): use VIF interrupt bit for break * sky-pke.c (pke_issue): use interrupt bit for break points
1998-07-31fix sanitizationJeff Holcomb1-1/+1
1998-07-29Fix sanitize misspellings.Jeff Law1-40/+40
1998-07-29Fix incorrect calculation of conditional field when being extractedAndrew Cagney2-1/+15
from a previous decode.
1998-07-28 Add support for new versions of mulwhi,mulwlo,macwhi,macwlo thatDoug Evans2-65/+53
accept an accumulator choice. * cpux.c,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
1998-07-28New testcases for PR 16547 (new instructions added).Doug Evans1-0/+4
1998-07-28Add note about limitations of insn_field_cmp().Andrew Cagney1-3/+6
1998-07-28Problems with conditional instruction-table fields (N!M, N=M, ...).Andrew Cagney2-67/+185
Was restricting `M' to opcode fields in the current word.
1998-07-27 * am33.igen: Detect cases where two operands must not match inJeff Law2-38/+49
non-DSP instructions.
1998-07-25For vr* processors start using vr.igen.Andrew Cagney5-441/+5
Sanitize out README.Cygnus.
1998-07-25Add new file vr.igen which is a merge of vr5400.igen and vr4320.igen.Andrew Cagney3-2/+555
Hack sanitize so that it doesn't sanitize vrXXX when either of keep-vr5400 or keep-vr4320 are specified. Move two basic vr4100 instructions from mips.igen to vr.igen.
1998-07-24Fri Jul 24 18:15:21 1998 Joyce Janczyn <janczyn@cygnus.com>Joyce Janczyn1-0/+10
* op_utils.c (do_syscall): Rewrite to use common/syscall.c. (syscall_read_mem, syscall_write_mem): New functions for syscall callbacks. * mn10300_sim.h: Add prototypes for syscall_read_mem and syscall_write_mem. * mn10300.igen: Change C++ style comments to C style comments. Check for divide by zero in div and divu ops.
1998-07-24 * m32r.c: Include cgen-mem.h.Doug Evans2-119/+128
* traps.c (m32r_trap): Tweak for -Wall. * m32rx.c: Include cgen-mem.h. * semx.c: Regenerate, get -Wall cleanups.
1998-07-24 * cgen-mem.h (DECLARE_SETT): Fix return type.Doug Evans1-0/+2
1998-07-24 * am33.igen (translate_xreg): New function. Use it as needed.Jeff Law2-28/+39
1998-07-24 * sim-model.c (model_option_handler): Remove unused variable `n'.Doug Evans1-0/+4
1998-07-24 * Makefile.in (clean,mostlyclean): Change leading spaces to a tab.Doug Evans1-1/+7
1998-07-24remove d30v sanitizationIan Lance Taylor5-104/+3
1998-07-23 * am33.igen: Add some missing instructions.Jeff Law2-11/+240
Missed a few last week... Grrr.
1998-07-23 * am33.igen: Autoincrement loads/store fixes.Jeff Law2-34/+259
1998-07-21 * cpu.h,extract.c: Regenerate. pc-rel calcs done on f_dispNN now.Doug Evans5-436/+583
* cpux.h,readx.c,semx.c: Ditto.
1998-07-21 * cgen-utils.c: Include bfd.h.Doug Evans1-0/+9
(sim_disassemble_insn): Update call to CGEN_EXTRACT_FN.
1998-07-21 * am33.igen: Add most am33 DSP instructions.Jeff Law2-15/+3540
1998-07-17Forward fit sky-branch updates to devo.Jillian Ye1-1/+5
1998-07-14fix sanitization; add trap.SJeff Holcomb1-0/+1
1998-07-14Fix goof.Jeff Law1-3/+3
1998-07-09 * am33.igen: Fix Z bit for remaining addc/subc instructions.Jeff Law2-40/+53
Do not sign extend immediate for mov imm,XRn. More random mul, mac & div fixes. Remove some unused variables. Sign extend 24bit displacement in memory addresses. Whee, more fixes.
1998-07-09 * mn10300.igen: Fix Z bit for addc and subc instructions.Jeff Law2-21/+36
Minor fixes in multiply/divide patterns. start-sanitize-am33 * am33.igen: Fix Z bit for addc Rm,Rn and subc Rm,Rn. Various fixes to 2 register multiply, divide and mac instructions. Set Z,N correctly for sat16. Sign extend 24 bit immediate for add, and sub instructions. * am33.igen: Add remaining non-DSP instructions. end-sanitize-am33
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