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1998-06-09* Updates to tx3904 peripheral simulations for ECC.Frank Ch. Eigler4-34/+73
Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com> * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE register upon non-zero interrupt event level, clear upon zero event value. * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal by passing zero event value. (*_io_{read,write}_buffer): Endianness fixes. * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes. (deliver_*_tick): Reduce sim event interval to 75% of count interval. * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based serial I/O and timer module at base address 0xFFFF0000.
1998-06-09* Handle 10 and 20-bit versions of Break instruction. Move handlingIan Carmichael4-45/+68
* of special values from signal_exception() in interp.c into mips.igen. * * Modified: gencode.c interp.c mips.igen sim-main.h
1998-06-09 * sim/sky/dma.h: New file.Doug Evans1-0/+9
* sim/sky/vif.h: New file. * sim/sky/vu.h: New file. * sim/sky/sce_main.c: Move magic numbers to .h files.
1998-06-09sky.ld: Remove big endian stuff in OUTPUT_FORMATJames Lemke2-1/+5
1998-06-09 * mips.igen (SWC1) : Correct the handling of ReverseEndianGavin Romig-Koch2-6/+11
and BigEndianCPU.
1998-06-09 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mipsGavin Romig-Koch2-1/+7
parts. * configure: Update.
1998-06-08 * sim/m32r/trap.cgs: Test trap 2.Doug Evans1-0/+4
1998-06-08Test trap 2.Doug Evans1-0/+30
1998-06-08Support for timers for mn103002. Still needs more testing/debugging.Joyce Janczyn1-0/+823
1998-06-08add test to verify that changes made to the PSW in-parallel-with a trapDavid Taylor1-0/+35
instruction end up in the bPSW and not in the PSW. (PR 16026).
1998-06-08Add dv-mn103tim.c and dv-mn103ser.cJoyce Janczyn1-1/+1
1998-06-08Add timer and serial devices (mn103tim and mn103ser), supportJoyce Janczyn1-0/+22
--board=am32 for runtime control of device simulation, and adjust interrupt settings to support am32 instead of am30.
1998-06-08Skeleton file for mn1030002 serial device implementation.Joyce Janczyn1-0/+413
1998-06-08Fix typo.Joyce Janczyn1-3/+0
1998-06-08Fix interrupt settings for mn103002, not mn10300 implementation.Joyce Janczyn1-74/+60
1998-06-08 * interp.c: (mn10300_option_handler): New function parses argumentsJoyce Janczyn1-114/+156
using sim-options. start-sanitize-am30 * (board): Add --board option for specifying am32. * (sim_open): Create new timer and serial devices and control configuration of other am32 devices via board option. end-sanitize-am30
1998-06-08Add new devices: mn103tim and mn103ser.Joyce Janczyn2-155/+213
1998-06-04Added support for the VU insn D (debug) & T (trace) bits.James Lemke1-3/+9
1998-06-04* Early check-in of tx3904 timer sim implementation for ECC.Frank Ch. Eigler8-28/+734
It is not yet properly tested. Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com> * dv-tx3904tmr.c: New file - implements tx3904 timer. * dv-tx3904{irc,cpu}.c: Mild reformatting. * configure.in: Include tx3904tmr in hw_device list. * configure: Rebuilt. * interp.c (sim_open): Instantiate three timer instances. Fix address typo of tx3904irc instance.
1998-06-04The r5900 doesn't have HI/LO DIV/MUL register problems. HobbleAndrew Cagney2-27/+130
checks on hi/lo usage but retain functions so that they can be used for HI/LO stall counting code.
1998-06-04Memory corruption problems - hw-event list wasn't correctAndrew Cagney2-3/+31
unlinking/freeing events. Couldn't handle the removal of a hw-event that just been scheduled.
1998-06-02 * interf.c (sim_open): Use revamped memory_read, which makesMark Alexander3-168/+395
byte-swapping unnecessary. Add -sparclite-board option for emulating RAM found on typical SPARClite boards. Print error message for unrecognized option. * erc32.c: Change RAM address and size from constants to variables, to allow emulation of SPARClite board RAM. (fetch_bytes, store_bytes): New helper functions for revamped mememory_read and memory_write. (memory_read, memory_write): Rewrite to store bytes in target byte order instead of storing words in host byte order; this greatly simplifies support of little-endian programs. (get_mem_ptr): Remove unnecessary byte parameter. (sis_memory_write, sis_memory_read): Store words in target byte order instead of host byte order. (byte_swap_words): Remove, no longer needed. * sis.h ((byte_swap_words): Remove declaration, no longer needed. (memory_read): Add new sz parameter. * sis.c (run_sim): Use revamped memory_read, which makes byte-swapping unnecessary. * exec.c (dispatch_instruction): Use revamped memory_read, which makes byte-swapping and double-word fetching unnecessary. * func.c (sparclite_board): Declare new variable. (get_regi): Handle little-endian data. (bfd_load): Recognize little-endian SPARClite as having little-endian data.
1998-06-02Allow simulator to work with Angel SWIs.Nick Clifton2-0/+12
1998-06-02* Move the sanitize comments to the right place.Ian Carmichael1-4/+4
1998-06-02* SYSCALL now uses exception vector.Ian Carmichael3-36/+75
* SKY: New memory mapping rules for k1seg, k0seg. * Modified Files: ChangeLog.sky ChangeLog interp.c sim-main.c
1998-06-02Mon Jun 1 17:14:19 1998 Anthony Thompson (athompso@cambridge.arm.com)Jason Molenda2-0/+980
* armos.c (ARMul_OSHandleSWI::SWI_Open): Handle special case of ":tt" to catch stdin in addition to stdout. (ARMul_OSHandleSWI::SWI_Seek): Return 0 or 1 to indicate failure or success of lseek(). From PR 15839, modified a bit by me to appease my sense of style--but not too much because I am lazy.
1998-06-01* Small TX39-only patch for ECC.Frank Ch. Eigler2-5/+19
Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com> * interp.c (decode_coproc): For TX39, add stub COP0 register #3, to allay warnings.
1998-06-01 * r5900.igen (rsqrt.s): Update based on r5900 ISA manual version 2.1.Jeff Law1-0/+7
(sqrt.s): Likewise.
1998-06-01* sky test suite fixes.Frank Ch. Eigler2-21/+50
Mon Jun 1 18:54:22 1998 Frank Ch. Eigler <fche@cygnus.com> * lib/sim-defs.exp (sim_run): Add possible environment variable list to simulator run. start-sanitize-sky * sim/sky/sky-defs.tcl: Use it. * sim/sky/t-pke2.vif1out: Update to match recent word-precise tracking table change in sim/mips/sky-pke.c. * sim/sky/t-pke3.trc: Ditto. * sim/sky/t-pke4.vif0expect: Ditto. end-sanitize-sky Mon May 18 10:37:47 1998 Doug Evans <devans@canuck.cygnus.com>
1998-05-29Match mips*tx39 not mipst*tx39.Andrew Cagney3-205/+205
1998-05-25Pull in preliminary versions of hw instances and handles from ../ppcAndrew Cagney5-0/+746
1998-05-25Make hw-main.h the main header file for H/W devices. Like sim-main.hAndrew Cagney7-102/+150
Update dv-*.c Replace *_callback with more correct. *_method. Update dv-*.c
1998-05-25Add files hw-alloc.[hc] (mising from last CI)Andrew Cagney7-33/+185
Move set_* macro's from hw-base to hw-device.
1998-05-25Initialize/destory hw-properties within the hw-device.Andrew Cagney4-0/+29
1998-05-25Split out hw-alloc code. Add constructor and destructor for hw-alloc.Andrew Cagney7-126/+83
1998-05-25Split out hw-event code. Clean up interface. Update all users.Andrew Cagney14-108/+276
1998-05-25Clean up create/delete of hw-portsAndrew Cagney5-55/+532
1998-05-25* hw-device.c (hw_ioctl), hw-device.h (hw_ioctl_callback): DropAndrew Cagney3-129/+51
PROCESSOR and CIA arguments.
1998-05-25De-sanitize simulator hw.Andrew Cagney3-77/+0
1998-05-25Fix mips SWL on 64bit ISA when 32 bit word appears in second half ofAndrew Cagney8-0/+666
64 bit bus. Test.
1998-05-24 * Initial support for "sim list vif[01]"Ron Unrau1-1/+1
1998-05-22Only enable H/W on some mips targets.Andrew Cagney9-125/+170
Move common hw-obj to Make-common Pacify GCC
1998-05-22Sanity clauseAndrew Cagney1-2/+2
1998-05-22Back out of hw-main _callback -> _descriptor changesAndrew Cagney3-18/+12
1998-05-21gencode.c: Mark BEGEZALL as LIKELY.Gavin Romig-Koch2-1/+5
1998-05-21 * interp.c: modified name of GIF devicePatrick Macdonald1-3/+3
* sky-gpuif.[ch]: IMT burst support and queue manipulation ( see ChangeLog.sky for complete details ) * sky-gs.c: modified name of GIF device
1998-05-21Fix sign extension on 32 bit add/sub instructions.Andrew Cagney8-74/+470
1998-05-21* interp.c (sim_fetch_register): Convert internal r5900 regs toAndrew Cagney2-1/+10
target byte order
1998-05-21* sim-hw.c: Include ctype.h.Andrew Cagney3-1/+583
(do_hw_poll_read): Do not assume EAGAIN.
1998-05-20c_gen.pl: Added subroutine "print_comment"Jillian Ye2-28/+57
and on/off option for "src line #"
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