aboutsummaryrefslogtreecommitdiff
path: root/sim
AgeCommit message (Collapse)AuthorFilesLines
2002-02-25Fix PR gdb/287. From wiz at danbala. Then->than and typos.Andrew Cagney4-3/+15
2002-02-21 * armos.c (SWIWrite0): Use generic host_callback mechanismKeith Seitz2-31/+50
for supported OS functions "open", "close", "write", etc. (SWIopen): Likewise. (SWIread): Likewise. (SWIwrite): Likewise. (SWIflen): Likewise. (ARMul_OSHandleSWI): Likewise.
2002-02-192002-02-18 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2-96/+382
* mips.igen: For all functions and instructions, list model names that support that instruction one per line.
2002-02-112002-02-11 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2-9/+32
* mips.igen: Add some additional comments about supported models, and about which instructions go where. (BC1b, MFC0, MTC0, RFE): Sort supported models in the same order as is used in the rest of the file.
2002-02-112002-02-11 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2-7/+14
* mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment indicating that ALU32_END or ALU64_END are there to check for overflow. (DADD): Likewise, but also remove previous comment about overflow checking.
2002-02-112002-02-10 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2-49/+59
* mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU, JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU, SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI, ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode fields (i.e., add and move commas) so that they more closely match the MIPS ISA documentation opcode partitioning.
2002-02-112002-02-10 Chris Demetriou cgd@sibyte.comChris Demetriou2-6/+18
* mips.igen (ADDI): Print immediate value. (BREAK): Print code. (DADDIU, DSRAV, DSRLV): Print correct instruction name. (SLL): Print "nop" specially, and don't run the code that does the shift for the "nop" case.
2002-02-102002-02-10 Chris Demetriou <cgd@broadcom.com>Chris Demetriou12-36/+50
* callback.c: Fix some spelling errors. * hw-device.h: Likewise. * hw-tree.c: Likewise. * sim-abort.c: Likewise. * sim-alu.h: Likewise. * sim-core.h: Likewise. * sim-events.c: Likewise. * sim-events.h: Likewise. * sim-fpu.h: Likewise. * sim-profile.h: Likewise. * sim-utils.c: Likewise.
2002-02-07Document check-in proceduresNick Clifton2-3/+15
2002-02-05Modify previous patch so that it is only triggered for COFF format executables.Nick Clifton2-11/+20
2002-02-04If a v5 architecture is detected, assume it might be an XScale binary, sinceNick Clifton2-0/+15
there is no way to distinguish between the two in the COFF file format.
2002-02-02Revert sh64 changes. Accidently committed.Andrew Cagney3-18/+0
2002-02-01* Contribute Hitachi SH5 simulator.Ben Elliston427-0/+53547
2002-01-31 * cgen-ops.h (ADDCQI, ADDCFQI, ADDOFQI, SUBCQI, SUBCFQI, SUBOFQI):Hans-Peter Nilsson2-1/+59
New functions.
2002-01-202002-01-20 Ben Elliston <bje@redhat.com>Ben Elliston2-1/+6
* sim-fpu.h (SIM_FPU_IS_QNAN): Replace "Quite" with "Quiet" in the comment for this enumerator.
2002-01-142002-01-14 Ben Elliston <bje@redhat.com>Ben Elliston2-2/+6
* sim-fpu.h: Fix comment about sim_fpu_* constants.
2002-01-12* Makefile.in (tmp-igen): Pass -I $(srcdir) to igen.Matthew Green8-27/+211
* igen.c (main): Change -I to add include paths for :include: files. Implement -G as per sim/igen, with just gen-icache=N support. Call load_insn_table() with the built include path. * ld-insn.c (parse_include_entry): New. Load an :include: file. (load_insn_table): New `includes' argument. Look for :include: entries and call parse_include_entry() for them. (main): Adjust load_insn_table() call. * ld-insn.h (model_include_fields): New enum. (load_insn_table): Update prototype. * table.c (struct _open_table, struct _table): Rework structures to handle included files. (table_push): Move the guts of table_open() here. * table.c (struct _open table, struct table): Make table object an indirect ptr to the current table file. (current_line, new_table_entry, next_line): Make file arg type open_table. (table_open): Use table_push. (table_entry_read): Point variable file at current table, at eof, pop last open table. * misc.h (NZALLOC): New macro. From sim/igen. * table.h, table.c (table_push): New function.
2002-01-10Add myself as ARM sim maintainerNick Clifton2-0/+6
2002-01-10Fix parameters passed to CPRead[13] and CPRead[14].Nick Clifton4-423/+478
2002-01-09General format tidy upsNick Clifton2-45/+51
2002-01-09Fix bug detected by GDB testsuite - when fetching registers more than 4Nick Clifton2-5/+19
bytes wide return 0 for the other bytes.
2002-01-04* bits.c (LSMASKED64): New inline function.Matthew Green5-4/+63
(LSEXTRACTED64): Likewise. * bits.h (_LSB_POS, _LSMASKn, LSMASK64): New macros from sim/common/sim-bits.h (LSMASKED64, LSEXTRACTED64): New functions definitions. * Makefile.in (sim-bits.o): Remove target. * main.c (zalloc): Fix typo in error message.
2001-12-21 * run.c (usage): Fix a typo.Kazu Hirata2-1/+5
2001-12-20 * compile.c: Fix formatting.Kazu Hirata2-22/+29
2001-12-20 * compile.c: Fix comment typos.Kazu Hirata2-22/+25
2001-12-16Don't try to link in sim-bits.o.Andrew Cagney3-3/+8
2001-12-15 * main.c: Include "defs.h", "bfd.h", "callback.h" and "remote-sim.h".Matthew Green3-0/+36
(sim_io_error): New function. * sim_calls.c: (sim_io_error): New function.
2001-12-15s/cygnus.com/redhat.com/Ben Elliston1-2/+2
2001-12-14* support sim-fpu.c for correct FP emulation.Matthew Green16-122/+228
* Makefile.in (LIB_OBJ): Add @sim_fpu@. (ICACHE_CFLAGS, SEMANTICS_CFLAGS): New variables. (icache.o, semantics.o): Add new ICACHE_FLAGS & SEMANTICS_FLAGS. (sim-fpu.o, sim-bits.o, tconfig.h): New targets. * configure.in: Rename INLINE_LOCALS to PSIM_INLINE_LOCALS. Add a check for sim/common/sim-fpu.c. Output sim_fpu and sim_fpu_cflags. * configure: Regenerate. * device.h (device_find_integer_array_property): Match function definition. * gen-icache.c (print_icache_internal_function_declaration): Rename INLINE_ICACHE to PSIM_INLINE_ICACHE. * gen-idecode.c (print_idecode_run_function_header): Rename INLINE_IDECODE to PSIM_INLINE_IDECODE. * gen-semantics.c (print_semantic_function_header): Rename EXTERN_SEMANTICS to PSIM_EXTERN_SEMANTICS. * gen-support.c (print_support_function_name): Rename INLINE_SUPPORT to PSIM_INLINE_SUPPORT. * igen.c (print_function_name): Also escape `(' and `)'. (gen_semantics_h): Rename EXTERN_SEMANTICS to PSIM_EXTERN_SEMANTICS. (gen_semantics_c): Likewise. Also output includes for "sim-fpu.h" * inline.h (INLINE_SIM_ENDIAN): Renamed INLINE_PSIM_ENDIAN. (EXTERN_SIM_ENDIAN): Renamed EXTERN_PSIM_ENDIAN. (STATIC_INLINE_SIM_ENDIAN): Renamed STATIC_INLINE_PSIM_ENDIAN. (INLINE_LOCALS): Renamed PSIM_INLINE_LOCALS. (EXTERN_SUPPORT): Renamed PSIM_EXTERN_SUPPORT. (INLINE_SUPPORT): Renamed PSIM_INLINE_SUPPORT. (EXTERN_SEMANTICS): Renamed PSIM_EXTERN_SEMANTICS. (INLINE_SEMANTICS): Renamed PSIM_INLINE_SEMANTICS. (EXTERN_IDECODE): Renamed PSIM_EXTERN_IDECODE. (INLINE_IDECODE): Renamed PSIM_INLINE_IDECODE. (EXTERN_ICACHE): Renamed PSIM_EXTERN_ICACHE. (INLINE_ICACHE): Renamed PSIM_INLINE_ICACHE. * options.c (options_inline): Fix names. * sim-endian-n.h: Change INLINE_SIM_ENDIAN to INLINE_PSIM_ENDIAN. * sim-endian.h: Likewise. * sim-main.h: New file. * std-config.h: Rename INLINE_LOCALS to PSIM_INLINE_LOCALS.
2001-12-02* Makefile.in (simops.h, table.c): Delete targets.Andrew Cagney4-164/+88
(tmp-gencode, gencode.o, gencode): Delete targets. (simops.h): New file. ($(BUILT_SRC_FROM_IGEN)): Do not depend on simops.h. * gencode.c: Delete file.
2001-12-01From Mark Peek.Andrew Cagney2-1/+7
* ppc-spr-table: Add SDA and PIR.
2001-11-18 2001-11-17 Fred Fish <fnf@redhat.com>Fred Fish2-7/+12
* sim-main.h (float_operation): Move enum declaration outside of _sim_cpu struct declaration.
2001-11-162001-11-16 Ben Harris <bjh21@netbsd.org>Ben Harris2-2/+8
* Makefile.in (armemu32.o): Replace $< with autoconf recommended $(srcdir)/.... (armemu26.o): Ditto.
2001-11-14when #size-cells is zero, don't expect a size.Andrew Cagney2-5/+17
2001-11-142001-11-14 Dave Brolley <brolley@redhat.com>Dave Brolley17-226/+739
* arch.c: Regenerate. * arch.h: Regenerate. * cpu.c: Regenerate. * cpu.h: Regenerate. * cpuall.h: Regenerate. * cpux.c: Regenerate. * cpux.h: Regenerate. * decode.c: Regenerate. * decode.h: Regenerate. * decodex.c: Regenerate. * decodex.h: Regenerate. * model.c: Regenerate. * modelx.c: Regenerate. * sem-switch.c: Regenerate. * sem.c: Regenerate. * semx-switch.c: Regenerate.
2001-11-142001-11-14 Dave Brolley <brolley@redhat.com>Dave Brolley11-215/+727
* arch.c: Regenerate. * arch.h: Regenerate. * cpu.c: Regenerate. * cpu.h: Regenerate. * cpuall.h: Regenerate. * decode.c: Regenerate. * decode.h: Regenerate. * model.c: Regenerate. * sem-switch.c: Regenerate. * sem.c: Regenerate.
2001-10-26Chirp fixes:Andrew Cagney3-5/+28
* hw_htab.c (htab_map_binary): Don't try to map the text section when it is empty. * emul_chirp.c (map_over_chirp_note): Default load-base to -1 not CHIRP_LOAD_BASE. (emul_chirp_create): Map in the interrupt table.
2001-10-20Enable PowerPC simulator on native linux and netbsd.Andrew Cagney3-2/+9
2001-10-18Add support for XScale's coprocessor access check register.Nick Clifton5-988/+944
Fix formatting.
2001-08-02Removed a section of code that didn't do anything, but left values inJohn R. Moore2-19/+5
memory. This was labeled as a hack to set r0/r1 with argc/argv.
2001-07-312001-07-31 Ben Elliston <bje@redhat.com>Ben Elliston2-6/+12
* lib/sim-defs.exp (run_sim_test): Include a description such as "assembling" or "linking" that identifies the phase a test fails in, for easier analysis of failures.
2001-07-28 * dv-m68hc11eepr.c (m68hc11eepr_info): Fix print of current writeStephane Carrez2-5/+11
address. (m68hc11eepr_port_event): Fix detach/attach logic.
2001-07-22 * Makefile.in (SIM_OBJS): Remove sim-resume.oStephane Carrez3-1/+88
* interp.c (sim_resume): New function from sim-resume.c, install the stepping event after having processed the pending ticks. (has_stepped): Likewise. (sim_info): Produce an output only if verbose or STATE_VERBOSE_P.
2001-07-18Regenerate using autoconf 2.13.Andrew Cagney2-29/+105
2001-07-16Makefile.in: Add dependencies on $(CPU_H).Daniel Jacobowitz2-3/+7
2001-07-10* Makefile.in (gencode): Provide explicit path to gencode.c.Andrew Cagney2-1/+5
2001-07-052001-07-05 Ben Elliston <bje@redhat.com>Ben Elliston8-15/+42
* Make-common.in (srccgen): Remove. (CGEN_CPU_DIR): Define. (CGEN_READ_SCM): Redefine without $(srccgen). (CGEN_ARCH_SCM): Ditto. (CGEN_CPU_SCM): Ditto. (CGEN_DECODE_SCM): Ditto. (CGEN_DESC_SCM): Ditto. * $arch/Makefile.in: Use $(CGEN_CPU_DIR) where applicable.
2001-05-20Improve HC11 simulator to support HC12Stephane Carrez6-201/+1710
2001-05-20 * dv-m68hc11sio.c (m68hc11sio_tx_poll): Always check forStephane Carrez4-23/+63
pending interrupts. * interrupts.c (interrupts_process): Keep track of the last number of masked insn cycles. (interrupts_initialize): Clear last number of masked insn cycles. (interrupts_info): Report them. (interrupts_update_pending): Compute clear and set masks of interrupts and clear the interrupt bits before setting them (due to SCI interrupt sharing). * interrupts.h (struct interrupts): New members last_mask_cycles and xirq_last_mask_cycles.
2001-05-11Fix handling of XScale LDRD and STRD instructions with post indexed ↵Nick Clifton2-6/+11
addressing modes.
generated by cgit v1.1 at 2025-01-09 05:05:29 +0000