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1998-06-04Added support for the VU insn D (debug) & T (trace) bits.James Lemke1-3/+9
1998-06-04* Early check-in of tx3904 timer sim implementation for ECC.Frank Ch. Eigler8-28/+734
It is not yet properly tested. Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com> * dv-tx3904tmr.c: New file - implements tx3904 timer. * dv-tx3904{irc,cpu}.c: Mild reformatting. * configure.in: Include tx3904tmr in hw_device list. * configure: Rebuilt. * interp.c (sim_open): Instantiate three timer instances. Fix address typo of tx3904irc instance.
1998-06-04The r5900 doesn't have HI/LO DIV/MUL register problems. HobbleAndrew Cagney2-27/+130
checks on hi/lo usage but retain functions so that they can be used for HI/LO stall counting code.
1998-06-04Memory corruption problems - hw-event list wasn't correctAndrew Cagney2-3/+31
unlinking/freeing events. Couldn't handle the removal of a hw-event that just been scheduled.
1998-06-02 * interf.c (sim_open): Use revamped memory_read, which makesMark Alexander3-168/+395
byte-swapping unnecessary. Add -sparclite-board option for emulating RAM found on typical SPARClite boards. Print error message for unrecognized option. * erc32.c: Change RAM address and size from constants to variables, to allow emulation of SPARClite board RAM. (fetch_bytes, store_bytes): New helper functions for revamped mememory_read and memory_write. (memory_read, memory_write): Rewrite to store bytes in target byte order instead of storing words in host byte order; this greatly simplifies support of little-endian programs. (get_mem_ptr): Remove unnecessary byte parameter. (sis_memory_write, sis_memory_read): Store words in target byte order instead of host byte order. (byte_swap_words): Remove, no longer needed. * sis.h ((byte_swap_words): Remove declaration, no longer needed. (memory_read): Add new sz parameter. * sis.c (run_sim): Use revamped memory_read, which makes byte-swapping unnecessary. * exec.c (dispatch_instruction): Use revamped memory_read, which makes byte-swapping and double-word fetching unnecessary. * func.c (sparclite_board): Declare new variable. (get_regi): Handle little-endian data. (bfd_load): Recognize little-endian SPARClite as having little-endian data.
1998-06-02Allow simulator to work with Angel SWIs.Nick Clifton2-0/+12
1998-06-02* Move the sanitize comments to the right place.Ian Carmichael1-4/+4
1998-06-02* SYSCALL now uses exception vector.Ian Carmichael3-36/+75
* SKY: New memory mapping rules for k1seg, k0seg. * Modified Files: ChangeLog.sky ChangeLog interp.c sim-main.c
1998-06-02Mon Jun 1 17:14:19 1998 Anthony Thompson (athompso@cambridge.arm.com)Jason Molenda2-0/+980
* armos.c (ARMul_OSHandleSWI::SWI_Open): Handle special case of ":tt" to catch stdin in addition to stdout. (ARMul_OSHandleSWI::SWI_Seek): Return 0 or 1 to indicate failure or success of lseek(). From PR 15839, modified a bit by me to appease my sense of style--but not too much because I am lazy.
1998-06-01* Small TX39-only patch for ECC.Frank Ch. Eigler2-5/+19
Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com> * interp.c (decode_coproc): For TX39, add stub COP0 register #3, to allay warnings.
1998-06-01 * r5900.igen (rsqrt.s): Update based on r5900 ISA manual version 2.1.Jeff Law1-0/+7
(sqrt.s): Likewise.
1998-06-01* sky test suite fixes.Frank Ch. Eigler2-21/+50
Mon Jun 1 18:54:22 1998 Frank Ch. Eigler <fche@cygnus.com> * lib/sim-defs.exp (sim_run): Add possible environment variable list to simulator run. start-sanitize-sky * sim/sky/sky-defs.tcl: Use it. * sim/sky/t-pke2.vif1out: Update to match recent word-precise tracking table change in sim/mips/sky-pke.c. * sim/sky/t-pke3.trc: Ditto. * sim/sky/t-pke4.vif0expect: Ditto. end-sanitize-sky Mon May 18 10:37:47 1998 Doug Evans <devans@canuck.cygnus.com>
1998-05-29Match mips*tx39 not mipst*tx39.Andrew Cagney3-205/+205
1998-05-25Pull in preliminary versions of hw instances and handles from ../ppcAndrew Cagney5-0/+746
1998-05-25Make hw-main.h the main header file for H/W devices. Like sim-main.hAndrew Cagney7-102/+150
Update dv-*.c Replace *_callback with more correct. *_method. Update dv-*.c
1998-05-25Add files hw-alloc.[hc] (mising from last CI)Andrew Cagney7-33/+185
Move set_* macro's from hw-base to hw-device.
1998-05-25Initialize/destory hw-properties within the hw-device.Andrew Cagney4-0/+29
1998-05-25Split out hw-alloc code. Add constructor and destructor for hw-alloc.Andrew Cagney7-126/+83
1998-05-25Split out hw-event code. Clean up interface. Update all users.Andrew Cagney14-108/+276
1998-05-25Clean up create/delete of hw-portsAndrew Cagney5-55/+532
1998-05-25* hw-device.c (hw_ioctl), hw-device.h (hw_ioctl_callback): DropAndrew Cagney3-129/+51
PROCESSOR and CIA arguments.
1998-05-25De-sanitize simulator hw.Andrew Cagney3-77/+0
1998-05-25Fix mips SWL on 64bit ISA when 32 bit word appears in second half ofAndrew Cagney8-0/+666
64 bit bus. Test.
1998-05-24 * Initial support for "sim list vif[01]"Ron Unrau1-1/+1
1998-05-22Only enable H/W on some mips targets.Andrew Cagney9-125/+170
Move common hw-obj to Make-common Pacify GCC
1998-05-22Sanity clauseAndrew Cagney1-2/+2
1998-05-22Back out of hw-main _callback -> _descriptor changesAndrew Cagney3-18/+12
1998-05-21gencode.c: Mark BEGEZALL as LIKELY.Gavin Romig-Koch2-1/+5
1998-05-21 * interp.c: modified name of GIF devicePatrick Macdonald1-3/+3
* sky-gpuif.[ch]: IMT burst support and queue manipulation ( see ChangeLog.sky for complete details ) * sky-gs.c: modified name of GIF device
1998-05-21Fix sign extension on 32 bit add/sub instructions.Andrew Cagney8-74/+470
1998-05-21* interp.c (sim_fetch_register): Convert internal r5900 regs toAndrew Cagney2-1/+10
target byte order
1998-05-21* sim-hw.c: Include ctype.h.Andrew Cagney3-1/+583
(do_hw_poll_read): Do not assume EAGAIN.
1998-05-20c_gen.pl: Added subroutine "print_comment"Jillian Ye2-28/+57
and on/off option for "src line #"
1998-05-20 * m32r-sim.h (PROFILE_COUNT_PARINSNS): New macro.Doug Evans1-0/+6
* mloopx.in (extract): Set abuf.addr for proper fill nop counting. (execute): Count parallel insns. * sim-if.c (print_m32r_misc_cpu): Print count. * sim-main.h (M32R_MISC_PROFILE): New member parallel_count.
1998-05-20 * cgen-trace.c (first_insn_p): New static local.Doug Evans1-0/+16
(trace_insn_init): Set it. (trace_insn_fini): Use TRACE_PREFIX. (trace_insn): Rewrite to use trace_prefix. * sim-trace.c (trace_prefix): Don't print filename arg if NULL. Adjust width accordingly. * sim-profile.h (PROFILE_DATA): New member profile_any_p. (PROFILE_ANY_P,PROFILE_INSN_P,PROFILE_MEMORY): New macros. (PROFILE_SCACHE_P,PROFILE_PC_P,PROFILE_CORE_P): New macros. (PROFILE_COUNT_INSN,PROFILE_COUNT_READ,PROFILE_COUNT_WRITE): Simplify. (PROFILE_COUNT_CORE): Simplify. * sim-profile.c (profile_option_handler): Compute profile_any_p.
1998-05-20 Zero bottom two bits of pc in jmp,jl insns.Doug Evans2-2/+10
* sem.c,sem-switch.c: Regenerate. * semx.c: Regenerate.
1998-05-20 * cgen-ops.h (ADDCFSI): Fix typo.Doug Evans1-0/+4
1998-05-19 * sim-if.c (do_trap): Treat traps 2-15 as hardware does.Doug Evans2-2/+8
1998-05-18 * sim/sky/sky.ld: Delete file.Doug Evans1-0/+6
1998-05-18* Monster patch - may destablize MIPS sims for a little while.Frank Ch. Eigler9-192/+1271
* Followup patch for SCEI PR 15853 * First check-in of TX3904 interrupt controller devices for ECC. [sanitized] * First implementation of MIPS hardware interrupt emulation. Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com> * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware modules. Recognize TX39 target with "mips*tx39" pattern. * configure: Rebuilt. * sim-main.h (*): Added many macros defining bits in TX39 control registers. (SignalInterrupt): Send actual PC instead of NULL. (SignalNMIReset): New exception type. * interp.c (board): New variable for future use to identify a particular board being simulated. (mips_option_handler,mips_options): Added "--board" option. (interrupt_event): Send actual PC. (sim_open): Make memory layout conditional on board setting. (signal_exception): Initial implementation of hardware interrupt handling. Accept another break instruction variant for simulator exit. (decode_coproc): Implement RFE instruction for TX39. (mips.igen): Decode RFE instruction as such. start-sanitize-tx3904 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904. * interp.c: Define "jmr3904" and "jmr3904debug" board types and bbegin to implement memory map. * dv-tx3904cpu.c: New file. * dv-tx3904irc.c: New file. end-sanitize-tx3904
1998-05-17 * cgen-sim.h (CGEN_CPU): New members idesc_{read,sem}_init_p.Doug Evans1-0/+3
* genmloop.sh: Use them rather than static locals.
1998-05-16 * erc32.c (close_port): Don't close stdin; it kills GDB.Doug Evans1-0/+8
(byte_swap_words): New function. * sis.h: (byte_swap_words): Declare. * interf.c (run_sim): Always fetch instructions as big-endian. * sis.c (run_sim): Ditto. Move this c/l entry from ../ChangeLog.
1998-05-16 * sim-if.c (sim_stop): Update call to @cpu@_engine_stop.Doug Evans2-126/+137
(sim_sync_stop): New function.
1998-05-16 * sim-engine.c (sim_engine_set_run_state): New function.Doug Evans2-28/+51
* sim-engine.h (sim_engine_set_run_state): Declare. * genmloop.sh (pending_reason,pending_sigrc): New static locals. (@cpu@_engine_stop): New args reason,sigrc. All callers updated. (engine_resume): Reorganize. Allow synchronous exit from main loop.
1998-05-16 * sim/m32r/allinsn.exp: Pass --m32rx-enable-special to gas.Doug Evans3-0/+51
* sim/m32r/misc.exp: Ditto.
1998-05-15 * Makefile.in (devices.o): Add dependencies.Doug Evans5-384/+709
* arch.h,cpu.c,cpu.h,cpuall.h: Regenerate. * sem-switch.c,sem.c: Regenerate. * mloop.in (execute): Update calls to TRACE_INSN_{INIT,FINI}. * cpux.c,cpux.h,modelx.c,semx.c: Regenerate. * m32rx.c (m32rx_model_mark_{busy,unbusy}_reg): New functions. * mloopx.in (execute): Update calls to TRACE_INSN_{INIT,FINI}.
1998-05-15 * cgen-trace.c (trace_insn_init): New arg first_p.Doug Evans3-5/+15
All callers updated. (trace_insn_fini): New arg last_p. All callers updated. * cgen-trace.h (trace_insn_init,trace_insn_fini): Update. (TRACE_INSN_INIT,TRACE_INSN_FINI): Update. * genmloop.sh (engine_resume): Update.
1998-05-15Run ranlib on installed copy of libsim.a.Joyce Janczyn2-1/+7
1998-05-15Install libsim.a $(exec_prefix)/lib/lib[target]-sim.a as part of install-sim.Joyce Janczyn2-17/+70
1998-05-15 * sis.h (uint64, int64): Define.Mark Alexander1-0/+13
* exec.c (SDIV, SDIVCC, UDIV, UDIVCC): Define new opcodes. * (mul64): Simplify calculation of negative result. * (div64): New helper function for 64-bit division. * (dispatch_instruction): Add emulation of SDIV, SDIVCC, UDIV, and UDIVCC.
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