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1998-06-12Fri June 12 16:24:00 1998 Joyce Janczyn <janczyn@cygnus.com>Joyce Janczyn1-0/+6
1998-06-12Add dv-mn103iop.Joyce Janczyn1-1/+1
1998-06-12 * sim-engine.c (sim_engine_get_run_state): New function.Doug Evans1-0/+5
1998-06-12New file for handling mn1030002 io ports.Joyce Janczyn1-0/+514
1998-06-12Add dv-mn103iop.c to list of files to sanitize out.Joyce Janczyn1-1/+1
1998-06-12 * interp.c: added call to sky_command_options_end() to closePatrick Macdonald1-1/+8
1998-06-12 * Makefile.in (stamp-{arch,cpu,decode}): Pass CGEN_FLAGS_TO_PASSDoug Evans1-0/+8
1998-06-12 * lib/sim-defs.exp (sim_run): Argument env_vals renamed to options,Doug Evans1-0/+4
1998-06-12 * lib/sim-defs.exp (sim_run): Argument env_vals renamed to options,Doug Evans1-4/+32
1998-06-11 * sim/sky/sky-defs.tcl (run_brn_test): Fix handling of dvpasm_flags.Doug Evans1-1/+1
1998-06-11 * sim/sky/sky-defs.tcl (run_brn_test): Fix `options' arg toDoug Evans1-0/+3
1998-06-11(sim_compile): Tweak output text.Doug Evans1-1/+1
1998-06-11 * sim/sky/vu.h (VU0_MEM1_WINDOW_START): New macro.Doug Evans1-0/+3
1998-06-11 * sim/sky/vu01reg-main.c: New file.Doug Evans1-0/+6
1998-06-11* Moving some sky-specific ChangeLog entries into ChangeLog.skyFrank Ch. Eigler1-8/+0
1998-06-11 * sim-core.h (SIM_CORE_SIGNAL_FN): New typedef.Doug Evans3-167/+205
1998-06-11Regenerate, gets a_m32r_trap -> m32r_trap renaming.Doug Evans1-1/+1
1998-06-11 * m32r-sim.h (m32r_trap): Declare.Doug Evans2-0/+4
1998-06-11 * Makefile.in (SIM_OBJS): Add traps.oDoug Evans1-1/+4
1998-06-11 * traps.c: New file. Trap support moved here from sim-if.c.Doug Evans5-11/+379
1998-06-11Regenerate. Updates from cgen for better VoidMode handling.Doug Evans5-72/+72
1998-06-10 * Make-common.in (CGEN_FLAGS_TO_PASS): New variable.Doug Evans1-0/+6
1998-06-10Wed June 10 14:34:00 1998 Joyce Janczyn <janczyn@cygnus.com>Joyce Janczyn2-2/+12
1998-06-10* SKY hardware interrupt tests.Frank Ch. Eigler1-0/+10
1998-06-10 * sim/m32r/addx.cgs: Add another test.Doug Evans3-0/+49
1998-06-10* Support for sky hardware interrupts. The sky-dma cannot triggerFrank Ch. Eigler3-3/+28
1998-06-10 * Updated several files to place all sky specific runtime optionsPatrick Macdonald2-99/+11
1998-06-10* Typo fix for tx3904tmr use of configuration parameters.Frank Ch. Eigler1-3/+3
1998-06-09* Handle 10 and 20-bit versions of Break instruction. Move handlingIan Carmichael1-0/+10
1998-06-09* Updates to tx3904 peripheral simulations for ECC.Frank Ch. Eigler4-34/+73
1998-06-09* Handle 10 and 20-bit versions of Break instruction. Move handlingIan Carmichael4-45/+68
1998-06-09 * sim/sky/dma.h: New file.Doug Evans1-0/+9
1998-06-09sky.ld: Remove big endian stuff in OUTPUT_FORMATJames Lemke2-1/+5
1998-06-09 * mips.igen (SWC1) : Correct the handling of ReverseEndianGavin Romig-Koch2-6/+11
1998-06-09 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mipsGavin Romig-Koch2-1/+7
1998-06-08 * sim/m32r/trap.cgs: Test trap 2.Doug Evans1-0/+4
1998-06-08Test trap 2.Doug Evans1-0/+30
1998-06-08Support for timers for mn103002. Still needs more testing/debugging.Joyce Janczyn1-0/+823
1998-06-08add test to verify that changes made to the PSW in-parallel-with a trapDavid Taylor1-0/+35
1998-06-08Add dv-mn103tim.c and dv-mn103ser.cJoyce Janczyn1-1/+1
1998-06-08Add timer and serial devices (mn103tim and mn103ser), supportJoyce Janczyn1-0/+22
1998-06-08Skeleton file for mn1030002 serial device implementation.Joyce Janczyn1-0/+413
1998-06-08Fix typo.Joyce Janczyn1-3/+0
1998-06-08Fix interrupt settings for mn103002, not mn10300 implementation.Joyce Janczyn1-74/+60
1998-06-08 * interp.c: (mn10300_option_handler): New function parses argumentsJoyce Janczyn1-114/+156
1998-06-08Add new devices: mn103tim and mn103ser.Joyce Janczyn2-155/+213
1998-06-04Added support for the VU insn D (debug) & T (trace) bits.James Lemke1-3/+9
1998-06-04* Early check-in of tx3904 timer sim implementation for ECC.Frank Ch. Eigler8-28/+734
1998-06-04The r5900 doesn't have HI/LO DIV/MUL register problems. HobbleAndrew Cagney2-27/+130
1998-06-04Memory corruption problems - hw-event list wasn't correctAndrew Cagney2-3/+31
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