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AgeCommit message (Expand)AuthorFilesLines
2021-04-12sim: cgen: move cgen_cpu_max_extra_bytes logic into the common codeMike Frysinger57-35/+156
2021-04-09Add missing ChangeLog entry for sim/rx change.Luis Machado1-0/+4
2021-04-09[sim,rx] Silence warning that turns into a build errorLuis Machado1-1/+1
2021-04-08Avoid sequence point warning in h8300 simTom Tromey2-1/+6
2021-04-08Add system includes in simTom Tromey20-0/+48
2021-04-08Do not use old-style definitions in simTom Tromey23-298/+191
2021-04-08Fix DTB generation mechanism and build failureLuis Machado3-3/+19
2021-04-08sim: set ASAN_OPTIONS=detect_leaks=0 when running igen and opc2cSimon Marchi11-16/+52
2021-04-08sim: testsuite: support exit 77 for unsupported testsMike Frysinger2-1/+8
2021-04-08sim: testsuite: skip tests when the port is disabledMike Frysinger2-0/+10
2021-04-08sim: testsuite: calculate $arch from $subdirMike Frysinger72-180/+142
2021-04-07Aarch64 sim fix for gcc-10 miscompilation.Jim Wilson2-2/+8
2021-04-07sim: m32c: opc2c: remove unused vlist variableSimon Marchi2-3/+4
2021-04-05Adjust location of readline in sim/erc32Tom Tromey3-2/+7
2021-04-04sim: mips: Add handlers to simulator monitor for unlink, lseek and statFaraz Shahbazker2-1/+75
2021-04-03sim: example-synacor: a simple implementation for referenceMike Frysinger34-1/+16037
2021-04-03sim: testsuite: integrate common tests into buildMike Frysinger7-71/+662
2021-04-03sim: add preliminary support for --enable-targetsMike Frysinger9-131/+389
2021-04-02sim: igen: merge build into top levelMike Frysinger17-5489/+451
2021-04-02sim: unify toolchain settingsMike Frysinger104-6382/+7842
2021-04-01Fix microblaze sim build errorMartin Liska2-1/+5
2021-03-13sim: rename BUILD_LDFLAGS to LDFLAGS_FOR_BUILDMike Frysinger8-5/+31
2021-03-13sim: introduce {COMPILE,LINK}_FOR_BUILDMike Frysinger16-49/+111
2021-03-08Enable maintainer mode for simTom Tromey5-16/+80
2021-03-08sim: delete unused BUILD_LIBS settingMike Frysinger10-16/+38
2021-03-07sim: igen: update options APIMike Frysinger4-3/+9
2021-03-07RegeneratedJeff Law2-6/+19
2021-03-07sim: testsuite: merge into toplevel automakeMike Frysinger11-201/+142
2021-03-07sim: switch top level to automakeMike Frysinger10-520/+3101
2021-02-28sim: igen: drop config.h & header checkingMike Frysinger12-1125/+58
2021-02-28sim: igen: delete more unused toolchain settingsMike Frysinger4-122/+7
2021-02-28sim: igen: delete unused FOR_BUILD varsMike Frysinger4-24/+7
2021-02-28sim: set up build-time compiler settingsMike Frysinger32-277/+313
2021-02-28sim: use AC_CHECK_TOOL to find arMike Frysinger32-93/+2793
2021-02-28sim: require AC_PROG_CPP explicitlyMike Frysinger62-4206/+4359
2021-02-28sim: delete unused SIM_EXTRA_LIBDEPSMike Frysinger6-8/+14
2021-02-27sim: delete redundant SIM_EXTRA_ALLMike Frysinger10-9/+26
2021-02-21sim: common: split up acinclude.m4 into individual m4 filesMike Frysinger144-1197/+2156
2021-02-20sim: merge configure.tgt into configure.acMike Frysinger4-324/+207
2021-02-19RISC-V: PR27158, fixed UJ/SB types and added CSS/CL/CS types for .insn.Nelson Chu2-3/+8
2021-02-13sim: testsuite: push $arch out to targetsMike Frysinger73-45/+274
2021-02-13sim: rx: mitigate fread warningMike Frysinger2-2/+8
2021-02-13sim: switch to AC_CONFIG_MACRO_DIRSMike Frysinger132-58741/+1168
2021-02-13sim: common: delete unused aclocal.m4Mike Frysinger2-15/+4
2021-02-08sim/rx: enable build with warningsAndrew Burgess3-1/+8
2021-02-08sim/rx: avoid pointer arithmetic on void * pointersAndrew Burgess3-6/+18
2021-02-08sim/rx: add some missing includesAndrew Burgess3-2/+8
2021-02-08sim/rx: use PRIx64 in printf format stringAndrew Burgess2-2/+7
2021-02-08sim/rx: move some variable declarations to the start of the blockAndrew Burgess3-3/+11
2021-02-08sim/rx: provide a format string for printfAndrew Burgess2-4/+9
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