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1996-09-04Second pass at canadian crossMichael Meissner2-10/+29
1996-09-04First cut at dealing with canadian crosses; make -t in debugger set ↵Michael Meissner5-30/+104
d10v_debug if DEBUG
1996-09-04More debug support; Enable -t/-v to work correctly; Add --enable-sim-cflags ↵Michael Meissner7-177/+1583
configure switch
1996-09-04Enhance debug supportMichael Meissner4-475/+756
1996-09-04 * simops.c: Include correct syscall.h for d10v, not host's.Mark Alexander2-4/+19
Fix #ifdef SYS_stat.
1996-09-03 * gencode.c: Fix various indention & style problems.Jeff Law3-83/+70
Remove test code. Remove #if 0 code. * interp.c: Provide prototypes for all static functions. Fix minor indention problems. (sim_open, sim_resume): Remove unused variables. (sim_read): Return type is "int". * simops.c: Remove unused variables. (divh): Make result of divide-by-zero zero. (setf): Initialize result to keep compiler quiet. (sar instructions): These just clear the overflow bit. * v850_sim.h: Provide prototypes for put_byte, put_half and put_word. Cleaning up.
1996-09-03Portability fixes; re-add printf/putchar trapsMichael Meissner1-16/+192
1996-09-03Fix typpppoJeff Law1-1/+1
1996-09-03 * interp.c: OP should be an array of 32bit operands!Jeff Law4-78/+248
(v850_callback): Declare. (do_format_5): Fix extraction of OP[0]. (sim_size): Remove debugging printf. (sim_set_callbacks): Do something useful. (sim_stop_reason): Gross hacks to get c-torture running. * simops.c: Simplify code for computing targets of bCC insns. Invert 's' bit if 'ov' bit is set for some instructions. Fix 'cy' bit handling for numerous instructions. Make the simulator stop when a halt instruction is encountered. Very crude support for emulated syscalls (trap 0). * v850_sim.h: Include "callback.h" and declare v850_callback. Items in the operand array are 32bits. Fixes & syscall stuff.
1996-08-31Opps. Forgot to commit this a few days ago.Jeff Law1-0/+35
1996-08-30 * simops.c: Fix "not1" and "set1".Jeff Law2-2/+4
1996-08-30 * simops.c: Don't forget to initialize temp forJeff Law2-0/+5
"ld.h" and "ld.w"
1996-08-30 * interp.c: Remove various debugging printfs.Jeff Law2-15/+2
1996-08-30 * simops.c: Fix satadd, satsub boundary case handling.Jeff Law2-5/+7
1996-08-30 * interp.c (hash): Fix.Jeff Law3-18/+80
* interp.c (do_format_8): Get operands correctly and call the target function. * simops.c: Rough cut at "clr1", "not1", "set1", and "tst1".
1996-08-30 * interp.c (do_format_4): Get operands correctly andJeff Law3-0/+61
call the target function. * simops.c: Rough cut at "sld.b", "sld.h", "sld.w", "sst.b", "sst.h", and "sst.w".
1996-08-30 * v850_sim.h: The V850 doesn't have split I&D spaces. ChangeJeff Law3-121/+181
accordingly. Remove many unused definitions. * interp.c: The V850 doesn't have split I&D spaces. Change accordingly. (get_longlong, get_longword, get_word): Deleted. (write_longlong, write_longword, write_word): Deleted. (get_operands): Deleted. (get_byte, get_half, get_word): New functions. (put_byte, put_half, put_word): New functions. * simops.c: Remove unused functions. Rough cut at "ld.b", "ld.h", "ld.w", "st.b", "st.h", "st.w" insns.
1996-08-30 * v850_sim.h (struct _state): Remove "psw" field. AddJeff Law3-78/+89
"sregs" field. (PSW): Remove bogus definition. * simops.c: Change condition code handling to use the psw register within the sregs array. Handle "ldsr" and "stsr".
1996-08-30 * simops.c: Handle "satadd", "satsub", "satsubi", "satsubr".Jeff Law2-25/+173
1996-08-30 * interp.c (do_format_5): Get operands correctly andJeff Law3-12/+39
call the target function. (sim_resume): Don't do a PC update for format 5 instructions. * simops.c: Handle "jarl" and "jmp" instructions.
1996-08-30 * simops.c: Fix minor typos. Handle "cmp", "setf", "tst"Jeff Law2-25/+146
"di", and "ei" instructions correctly.
1996-08-30 * interp.c (do_format_3): Get operands correctly and callJeff Law3-13/+211
the target function. * simops.c: Handle bCC instructions.
1996-08-30 * simops.c: Add condition code handling to shift insns.Jeff Law2-30/+101
Fix minor typos in condition code handling for other insns.
1996-08-30 * Makefile.in: Fix typo.Jeff Law2-19/+79
* simops.c: Add condition code handling to "sub" "subr" and "divh" instructions.
1996-08-29 * interp.c (hash): Update to be more accurate.Jeff Law5-138/+348
(lookup_hash): Call hash rather than computing the hash code here. (do_format_1_2): Handle format 1 and format 2 instructions. Get operands correctly and call the target function. (do_format_6): Get operands correctly and call the target function. (do_formats_9_10): Rough cut so shift ops will work. (sim_resume): Tweak to deal with format 1 and format 2 handling in a single funtion. Don't update the PC for format 3 insns. Fix typos. * simops.c: Slightly reorganize. Add condition code handling to "add", "addi", "and", "andi", "or", "ori", "xor", "xori" and "not" instructions. * v850_sim.h (reg_t): Registers are 32bits. (_state): The V850 has 32 general registers. Add a 32bit psw and pc register too. Add accessor macros Fixing lots of stuff. Starting to add condition code support. Basically check pointing the work to date.
1996-08-29 * simops.c: Add shift support.Jeff Law2-22/+56
1996-08-29Fix typos in multiply and divide code.Jeff Law1-3/+3
1996-08-29 * simops.c: Add multiply & divide support. Abort for systemJeff Law2-48/+93
instructions.
1996-08-29 * simops.c: Add logicals, mov, movhi, movea, add, addi, subJeff Law2-40/+147
and subr. No condition codes yet.
1996-08-29 * ChangeLog, Makefile.in, configure, configure.in, v850_sim.h,Jeff Law8-0/+1274
gencode.c, interp.c, simops.c: Created. So we've got something to hack on.
1996-08-29 * configure.in (v850-*-*): Added V850 simulator.Jeff Law1-0/+3
1996-08-29Wed Aug 28 17:33:19 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt4-69/+221
* Makefile.in, d10v_sim.h, interp.c: Fix byte-order problems.
1996-08-28New file.Martin Hunt2-4/+54
1996-08-27Mon Aug 26 18:30:28 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt2-84/+275
* d10v_sim.h (SEXT32): Added. * interp.c: Commented out printfs. * simops.c: Fixed error in sb and st2w.
1996-08-22 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, andIan Lance Taylor1-26/+114
getopt1.o, rather than on gencode.c. Link objects together. Don't link against -liberty. (gencode.o, getopt.o, getopt1.o): New targets. * gencode.c: Include <ctype.h> and "ansidecl.h". (AND): Undefine after including "ansidecl.h". (ULONG_MAX): Define if not defined. (OP_*): Don't define macros; now defined in opcode/mips.h. (main): Call my_strtoul rather than strtoul. (my_strtoul): New static function.
1996-08-19Fixes from AndrewMichael Meissner2-0/+30
1996-08-18removed NOTES from Things-to-keep since it's a dead fileAngela Marie Thomas1-1/+0
1996-08-13Improve -t options support to list all of the configuration macros & work ↵Michael Meissner1-0/+13
standalone
1996-08-12Test whether /dev/zero works before attemping to us itMichael Meissner3-1/+45
1996-08-12fix for D10V.Martin Hunt1-1/+1
1996-08-08If HAVE_TERMOS_STRUCTURE is not defined, make sure HAVE_TCGETATTR is also ↵Michael Meissner1-0/+3
not defined.
1996-08-07Allow simulator to build on other machines than x86Michael Meissner1-0/+9
1996-08-067/30 release from AndrewMichael Meissner9-152/+719
1996-08-03Fri Aug 2 17:44:24 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt3-72/+365
* d10v_sim.h, simops.c: Snapshot
1996-08-02Thu Aug 1 17:05:24 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt6-0/+2360
* ChangeLog, Makefile.in, configure, configure.in, d10v_sim.h, gencode.c, interp.c, simops.c: Created.
1996-08-02Thu Aug 1 17:08:41 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt2-0/+43
* configure.in (d10v-*-*): Added D10V simulator.
1996-07-23New simulator changes from AndrewMichael Meissner50-6007/+10369
1996-07-18 * gencode.c (process_instructions): Generate word64 and uword64Stu Grossman2-13/+22
instead of `long long' and `unsigned long long' data types. * interp.c: #include sysdep.h to get signals, and define default for SIGBUS. * (Convert): Work around for Visual-C++ compiler bug with type conversion. * support.h: Make things compile under Visual-C++ by using __int64 instead of `long long'. Change many refs to long long into word64/uword64 typedefs.
1996-07-10 * compile.c (sim_resume): Fix all rotate-by-2-bits insns.Jeff Law2-4/+8
1996-07-05No longer need to sanitize away h8s stuff.Jeff Law4-43/+2
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