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path: root/sim/v850/simops.c
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2008-02-06* simops.c (OP_1C007E0): Compensate for 64 bit hosts.DJ Delorie1-7/+9
(OP_18007E0): Likewise. (OP_2C007E0): Likewise. (OP_28007E0): Likewise. * v850.igen (divh): Likewise.
2008-02-06Index: ChangeLogDJ Delorie1-82/+151
* configure.ac (v850): V850 now has a testsuite. * configure (v850): Likewise. Index: testsuite/ChangeLog * sim/v850/: New directory. * sim/v850/allinsns.exp: New. * sim/v850/bsh.cgs: New. * sim/v850/div.cgs: New. * sim/v850/divh.cgs: New. * sim/v850/divh_3.cgs: New. * sim/v850/divhu.cgs: New. * sim/v850/divu.cgs: New. * sim/v850/sar.cgs: New. * sim/v850/satadd.cgs: New. * sim/v850/satsub.cgs: New. * sim/v850/satsubi.cgs: New. * sim/v850/satsubr.cgs: New. * sim/v850/shl.cgs: New. * sim/v850/shr.cgs: New. * sim/v850/testutils.cgs: New. * sim/v850/testutils.inc: New. Index: v850/ChangeLog * simops.c (OP_C0): Correct saturation logic. (OP_220): Likewise. (OP_A0): Likewise. (OP_660): Likewise. (OP_80): Likewise. * simops.c (OP_2A0): If the shift count is zero, clear the carry. (OP_A007E0): Likewise. (OP_2C0): Likewise. (OP_C007E0): Likewise. (OP_280): Likewise. (OP_8007E0): Likewise. * simops.c (OP_2C207E0): Correct PSW flags for special divu conditions. (OP_2C007E0): Likewise, for div. (OP_28207E0): Likewise, for divhu. (OP_28007E0): Likewise, for divh. Also, sign-extend the correct operand. * v850.igen (divh): Likewise, for 2-op divh. * v850.igen (bsh): Fix carry logic.
2004-01-18* simops.c: Include <sys/types.h>.Mark Kettenis1-0/+2
2003-04-06* simops.c (OP_40): Delete. Move code to...Nick Clifton1-44/+0
* v850-igen.c (): ...Here. Sign extend the first operand. * simops.h (OP_40): Remove prototype.
2002-11-302002-11-30 Andrew Cagney <cagney@redhat.com>Andrew Cagney1-19/+19
* simops.c: Use int, 1, 0 instead of boolean, true and false. * sim-main.h: Ditto.
2002-09-30Fix handling of v850e bit-twiddle instructions.Jim Wilson1-2/+2
* simops.c (OP_E6077E0): And op1 with 7 after reading register, not before. (BIT_CHANGE_OP): Likewise.
2002-09-27Fix bug in support for trap instruction.Jim Wilson1-1/+1
* simops (OP_10007E0): Don't subtract 4 from PC.
2002-08-29Makefile.in: Add gen-zero-r0 option.Nick Clifton1-1/+1
sim-main.h (GPR_SET, GPR_CLEAR): Define. simops.c (OP_24007E0): Sign extend the imm9 operand of a mul instruction.
2002-06-17* simops.c (trace_result): Fix printf formatting.Andrew Cagney1-1/+2
1999-04-16Initial creation of sourceware repositorygdb-4_18-branchpointStan Shebs1-0/+2733
1999-04-16Initial creation of sourceware repositoryStan Shebs1-2778/+0
1997-09-19Clean up tracing for Bcond & jmp insns.Andrew Cagney1-240/+0
Fix computation of disp16 and disp22. Clean up tracing of sld* insns.
1997-09-19Fix cmov immed.Andrew Cagney1-17/+1
1997-09-19Fix cmov insn.Andrew Cagney1-16/+1
1997-09-17Clean up more tracing.Andrew Cagney1-35/+0
FIX interrupt delivery - was zapping PSW before it had been saved. FIX interrupt return, was one instruction out.
1997-09-17Fix tracing for: "ctret", "bsw", "hsw"Andrew Cagney1-103/+3
Fix bugs in: "bsh", "callt", "stsr".
1997-09-16Smooth some of ALU tracing's rough edges.Andrew Cagney1-232/+127
Fix switch insn.
1997-09-16Use trace_one_insn in trace functions. Buffer up trace data so thatAndrew Cagney1-163/+123
it is displayed in a single block.
1997-09-16Restrict ldsr (load system register) to modifying just non-reserved PSW bits.Andrew Cagney1-35/+0
For v850eq, include PSW[US] in bits that can be modified.
1997-09-16 * simops.c (Multiply64): Don't store into register zero.Jim Wilson1-2/+5
1997-09-15Fix sanitization for v850 V v850e V v850eqAndrew Cagney1-413/+198
1997-09-15For v850eq start up with US bit set.Andrew Cagney1-313/+117
Let sim_analyze_program determine the architecture. Fix various sanitizations.
1997-09-10Have trace_input, trace_output use sim-trace for IO.Andrew Cagney1-47/+57
1997-09-08Add multi-sim support to v850/v850e/v850eq simulators.Andrew Cagney1-103/+110
1997-09-04Replace memory model with one from sim/common directory.Andrew Cagney1-25/+115
1997-09-03Pacify gcc-current -Wall.Andrew Cagney1-0/+4
1997-09-03Add real SIM_DESC arg to v850 simulator.Andrew Cagney1-26/+34
Add --enable-sim-warnings, use/fix errors. Add --enable-sim-endian, don't use. Add common modules. Don't yet use most.
1997-09-01Compile from UNIX to cygwin32.Andrew Cagney1-1/+64
1997-08-22Updated with respect to the HDD-tool-0611 document.Nick Clifton1-58/+64
1997-08-20Added N step divide routines, courtesy of Sugimoto at NEC.Nick Clifton1-218/+335
1997-08-20Fixed interpretation of SR bit in list18 structures.Nick Clifton1-640/+1931
1997-04-17Cleanups to compile under FreeBSDAndrew Cagney1-10/+17
1996-12-31Deal with kill encoding the signal via the exit status.Michael Meissner1-3/+6
1996-12-27Allow exit to work normally under gdbMichael Meissner1-102/+112
1996-10-31Fix linux build problem.Gavin Romig-Koch1-0/+1
1996-10-30 * simops.c (OP_10007E0): Handle SYS_times and SYS_gettimeofday.Jeff Law1-0/+22
Check it into devo too.
1996-10-30 * simops.c (OP_10007E0): Handle SYS_time.Jeff Law1-0/+3
Check into devo too.
1996-10-29 * simops.c: Include <sys/stat.h>.Jeff Law1-18/+13
(OP_10007E0): Handle SYS_stat. For RW testing.
1996-10-24 * simops.c (OP_500): Mask off low bit in displacementJeff Law1-2/+2
for sld.w. (OP_501): Similarly. More bugs exposed by tda testing.
1996-10-24 * simops.c (OP_500): Fix displacement handling for sld.w.Jeff Law1-2/+2
(OP_501): Similarly for sst.w. More fixes exposed by tda testing.
1996-10-24 * simops.c (trace_input): Remove all references to SEXT7.Jeff Law1-10/+10
(OP_300, OP_400, OP_500, OP_380, OP_480, OP_501): Displacement is zero extended for sst/sld instructions. * v850_sim.h (SEX7): Delete. It's no longer needed (and it was incorrect anyway). So we properly simulate sst/sld instructions.
1996-10-24 * Makefile.in: Get rid of srcroot. Set all INSTALL macros viaStu Grossman1-32/+46
autoconf. * gencode.c (write_opcodes): Pad operands field to account for MSVC braindamage. * simops.c: Include errno.h. Exclude SYS_chown, since MSVC doesn't support it. (Why is this here in the first place?!?) * v850_sim.h: Get rid of 64 bit defs. Also, get rid of #elif's. Change number of operands in struct simops from 9 to 6. Define SIGTRAP and SIGQUIT for MSVC.
1996-09-28 * gencode.c (write_opcodes): Output hex values for opcode maskStu Grossman1-0/+8
and patterns. * interp.c (sim_resume): Save and restore PC from the appropriate register. * (sim_fetch_register sim_store_register): Fix byte-order problem with reading and writing registers. * simops.c (OP_FFFF): Implement pseudo-breakpoint insn.
1996-09-27 * simops.c (trace_input): Fix thinko.Jeff Law1-7/+7
1996-09-12Print line # and function name or filename if they exist for each PC.Michael Meissner1-3/+64
1996-09-11Add tracing support; Fix some problems with hardwired sizesMichael Meissner1-97/+594
1996-09-10 * interp.c (hash): Make this an inline functionJeff Law1-30/+4
when compiling with GCC. Simplify. * simpos.c: Explicitly include "sys/syscall.h". Remove some #if 0'd code. Enable more emulated syscalls. Checking in more stuff.
1996-09-03 * gencode.c: Fix various indention & style problems.Jeff Law1-53/+40
Remove test code. Remove #if 0 code. * interp.c: Provide prototypes for all static functions. Fix minor indention problems. (sim_open, sim_resume): Remove unused variables. (sim_read): Return type is "int". * simops.c: Remove unused variables. (divh): Make result of divide-by-zero zero. (setf): Initialize result to keep compiler quiet. (sar instructions): These just clear the overflow bit. * v850_sim.h: Provide prototypes for put_byte, put_half and put_word. Cleaning up.
1996-09-03 * interp.c: OP should be an array of 32bit operands!Jeff Law1-41/+196
(v850_callback): Declare. (do_format_5): Fix extraction of OP[0]. (sim_size): Remove debugging printf. (sim_set_callbacks): Do something useful. (sim_stop_reason): Gross hacks to get c-torture running. * simops.c: Simplify code for computing targets of bCC insns. Invert 's' bit if 'ov' bit is set for some instructions. Fix 'cy' bit handling for numerous instructions. Make the simulator stop when a halt instruction is encountered. Very crude support for emulated syscalls (trap 0). * v850_sim.h: Include "callback.h" and declare v850_callback. Items in the operand array are 32bits. Fixes & syscall stuff.
1996-08-30 * simops.c: Fix "not1" and "set1".Jeff Law1-2/+2
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