| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2002-11-30 | 2002-11-30 Andrew Cagney <cagney@redhat.com> | Andrew Cagney | 1 | -2/+2 | |
| * simops.c: Use int, 1, 0 instead of boolean, true and false. * sim-main.h: Ditto. | |||||
| 2002-08-29 | Makefile.in: Add gen-zero-r0 option. | Nick Clifton | 1 | -0/+2 | |
| sim-main.h (GPR_SET, GPR_CLEAR): Define. simops.c (OP_24007E0): Sign extend the imm9 operand of a mul instruction. | |||||
| 1999-04-16 | Initial creation of sourceware repositorygdb-4_18-branchpoint | Stan Shebs | 1 | -0/+388 | |
| 1999-04-16 | Initial creation of sourceware repository | Stan Shebs | 1 | -470/+0 | |
| 1997-09-19 | Clean up tracing for Bcond & jmp insns. | Andrew Cagney | 1 | -0/+41 | |
| Fix computation of disp16 and disp22. Clean up tracing of sld* insns. | |||||
| 1997-09-19 | Fix cmov immed. | Andrew Cagney | 1 | -3/+17 | |
| 1997-09-19 | Fix cmov insn. | Andrew Cagney | 1 | -0/+17 | |
| 1997-09-17 | Clean up more tracing. | Andrew Cagney | 1 | -1/+1 | |
| FIX interrupt delivery - was zapping PSW before it had been saved. FIX interrupt return, was one instruction out. | |||||
| 1997-09-17 | Fix tracing for: "ctret", "bsw", "hsw" | Andrew Cagney | 1 | -5/+52 | |
| Fix bugs in: "bsh", "callt", "stsr". | |||||
| 1997-09-16 | Smooth some of ALU tracing's rough edges. | Andrew Cagney | 1 | -5/+59 | |
| Fix switch insn. | |||||
| 1997-09-16 | Restrict ldsr (load system register) to modifying just non-reserved PSW bits. | Andrew Cagney | 1 | -0/+1 | |
| For v850eq, include PSW[US] in bits that can be modified. | |||||
| 1997-09-15 | For instructions moved into v850.igen was computing (wrong) NIA when | Andrew Cagney | 1 | -4/+10 | |
| this wasn't needed. | |||||
| 1997-09-15 | Fix sanitization for v850 V v850e V v850eq | Andrew Cagney | 1 | -4/+31 | |
| 1997-09-15 | For v850eq start up with US bit set. | Andrew Cagney | 1 | -0/+52 | |
| Let sim_analyze_program determine the architecture. Fix various sanitizations. | |||||
| 1997-09-12 | Check reserved bits before executing instructions. | Andrew Cagney | 1 | -0/+1 | |
| Make v850[eq] the the default simulator. Report illegal instructions. Include v850e instructions in v850eq. | |||||
| 1997-09-12 | Add profiling support to v850*. | Andrew Cagney | 1 | -0/+8 | |
| 1997-09-08 | Add multi-sim support to v850/v850e/v850eq simulators. | Andrew Cagney | 1 | -26/+51 | |
| 1997-09-04 | Replace memory model with one from sim/common directory. | Andrew Cagney | 1 | -9/+15 | |
| 1997-09-03 | Pacify gcc-current -Wall. | Andrew Cagney | 1 | -2/+1 | |
| 1997-09-03 | Standard simulator header file. | Andrew Cagney | 1 | -0/+172 | |
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index : riscv-gnu-toolchain/gdb.git | |
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