| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2014-01-07 | remove PARAMS from sim | Tom Tromey | 1 | -3/+3 |
| 2012-03-29 | Commit gdb and sim support for v850e2 and v850e2v3 on behalf of | Kevin Buettner | 1 | -2/+296 |
| 2002-11-30 | 2002-11-30 Andrew Cagney <cagney@redhat.com> | Andrew Cagney | 1 | -2/+2 |
| 2002-08-29 | Makefile.in: Add gen-zero-r0 option. | Nick Clifton | 1 | -0/+2 |
| 1999-04-16 | Initial creation of sourceware repositorygdb-4_18-branchpoint | Stan Shebs | 1 | -0/+388 |
| 1999-04-16 | Initial creation of sourceware repository | Stan Shebs | 1 | -470/+0 |
| 1997-09-19 | Clean up tracing for Bcond & jmp insns. | Andrew Cagney | 1 | -0/+41 |
| 1997-09-19 | Fix cmov immed. | Andrew Cagney | 1 | -3/+17 |
| 1997-09-19 | Fix cmov insn. | Andrew Cagney | 1 | -0/+17 |
| 1997-09-17 | Clean up more tracing. | Andrew Cagney | 1 | -1/+1 |
| 1997-09-17 | Fix tracing for: "ctret", "bsw", "hsw" | Andrew Cagney | 1 | -5/+52 |
| 1997-09-16 | Smooth some of ALU tracing's rough edges. | Andrew Cagney | 1 | -5/+59 |
| 1997-09-16 | Restrict ldsr (load system register) to modifying just non-reserved PSW bits. | Andrew Cagney | 1 | -0/+1 |
| 1997-09-15 | For instructions moved into v850.igen was computing (wrong) NIA when | Andrew Cagney | 1 | -4/+10 |
| 1997-09-15 | Fix sanitization for v850 V v850e V v850eq | Andrew Cagney | 1 | -4/+31 |
| 1997-09-15 | For v850eq start up with US bit set. | Andrew Cagney | 1 | -0/+52 |
| 1997-09-12 | Check reserved bits before executing instructions. | Andrew Cagney | 1 | -0/+1 |
| 1997-09-12 | Add profiling support to v850*. | Andrew Cagney | 1 | -0/+8 |
| 1997-09-08 | Add multi-sim support to v850/v850e/v850eq simulators. | Andrew Cagney | 1 | -26/+51 |
| 1997-09-04 | Replace memory model with one from sim/common directory. | Andrew Cagney | 1 | -9/+15 |
| 1997-09-03 | Pacify gcc-current -Wall. | Andrew Cagney | 1 | -2/+1 |
| 1997-09-03 | Standard simulator header file. | Andrew Cagney | 1 | -0/+172 |
