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path: root/sim/v850/interp.c
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2003-09-05Add support for v850e1 instructionsNick Clifton1-0/+1
2003-02-27Index: arm/ChangeLogAndrew Cagney1-2/+2
2003-02-27 Andrew Cagney <cagney@redhat.com> * wrapper.c (sim_create_inferior, sim_open): Rename _bfd to bfd. Index: common/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * sim-utils.h (sim_analyze_program, sim_load_file): Rename _bfd to bfd. * sim-hload.c (sim_load), sim-base.h (sim_state_base): Ditto. * nrun.c (main): Ditto. Index: d10v/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd. Index: erc32/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * interf.c (sim_open, sim_create_inferior): Rename _bfd to bfd. Index: h8300/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * compile.c (sim_open, sim_create_inferior): Rename _bfd to bfd. Index: h8500/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * compile.c (sim_open, sim_create_inferior): Rename _bfd to bfd. Index: i960/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * sim-if.c (sim_open, sim_create_inferior): Rename _bfd to bfd. Index: m32r/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * sim-if.c (sim_open, sim_create_inferior): Rename _bfd to bfd. Index: m68hc11/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * interp.c (sim_prepare_for_program, sim_open) (sim_create_inferior): Rename _bfd to bfd. Index: mcore/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd. Index: mips/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * interp.c (sim_open): (sim_create_inferior): Index: mn10200/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd. Index: mn10300/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * interp.c (sim_open, sim_create_inferior, sim_open) (sim_create_inferior): Rename _bfd to bfd. Index: ppc/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * sim_calls.c (sim_open, sim_create_inferior): Rename _bfd to bfd. Index: sh/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * interp.c (init_dsp, sim_open, sim_create_inferior): Rename _bfd to bfd. Index: v850/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd. Index: z8k/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * iface.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
2002-09-19Remove v850ea referencesNick Clifton1-11/+0
1999-04-16Initial creation of sourceware repositorygdb-4_18-branchpointStan Shebs1-0/+360
1999-04-16Initial creation of sourceware repositoryStan Shebs1-357/+0
1998-02-28Add generic sim-info.c:sim_info() function using module mechanism.Andrew Cagney1-21/+17
Clean up compile probs in mips/vr5400.
1997-09-17Clean up more tracing.Andrew Cagney1-172/+78
FIX interrupt delivery - was zapping PSW before it had been saved. FIX interrupt return, was one instruction out.
1997-09-16Restrict ldsr (load system register) to modifying just non-reserved PSW bits.Andrew Cagney1-22/+26
For v850eq, include PSW[US] in bits that can be modified.
1997-09-15For v850eq start up with US bit set.Andrew Cagney1-6/+7
Let sim_analyze_program determine the architecture. Fix various sanitizations.
1997-09-12Check reserved bits before executing instructions.Andrew Cagney1-0/+6
Make v850[eq] the the default simulator. Report illegal instructions. Include v850e instructions in v850eq.
1997-09-12Add profiling support to v850*.Andrew Cagney1-8/+4
1997-09-10o Wordwrap usage messages from sim-optionsAndrew Cagney1-1/+3
o Clarify how to use alias options o use in sim-watch (better usage message) o Don't pass something on the stack into the watch-point interrupt hander.
1997-09-08Add multi-sim support to v850/v850e/v850eq simulators.Andrew Cagney1-339/+120
1997-09-04Replace memory model with one from sim/common directory.Andrew Cagney1-279/+31
1997-09-03Pacify gcc-current -Wall.Andrew Cagney1-15/+15
1997-09-03Add real SIM_DESC arg to v850 simulator.Andrew Cagney1-193/+179
Add --enable-sim-warnings, use/fix errors. Add --enable-sim-endian, don't use. Add common modules. Don't yet use most.
1997-08-27Add ABFD argument to sim_create_inferior. Document.Andrew Cagney1-2/+6
Add file sim-hload.c - generic load for hardware only simulators. Review each simulators sim_open, sim_load, sim_create_inferior so that they more closely match required behavour.
1997-08-26Flush defunct sim_kill.Andrew Cagney1-7/+0
1997-08-25Add ABFD argument to sim_open call. Pass through to sim_config soAndrew Cagney1-159/+45
that image properties such as endianness can be checked. More strongly document the expected behavour of each of the sim_* interfaces. Add default endian argument to simulator config macro SIM_AC_OPTION_ENDIAN. Use in sim_config.
1997-04-18Ref gdb/11763 - can't stop a running simulator:Andrew Cagney1-0/+7
o Provide poll_quit callback to simulators so that they can poll for SIGINT on clueless OS's. o Add sim_stop to simulators so that clients can request a halt (eg gdbtk's STOP button) Works for PPC! o Re-arange remote-sim.c so that the hard work is moved from gdbsim_resume() to gdbsim_wait() (where it should be).
1997-04-17 * Makefile.in (SIM_OBJS): Add sim-load.o.David Edelsohn1-111/+640
* interp.c (sim_kind, myname): New static locals. (sim_open): Set sim_kind, myname. Ignore -E arg. (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to load file into simulator. Set start address from bfd. (sim_create_inferior): Return SIM_RC. Delete arg start_address.
1996-09-28 * gencode.c (write_opcodes): Output hex values for opcode maskStu Grossman1-4/+8
and patterns. * interp.c (sim_resume): Save and restore PC from the appropriate register. * (sim_fetch_register sim_store_register): Fix byte-order problem with reading and writing registers. * simops.c (OP_FFFF): Implement pseudo-breakpoint insn.
1996-09-11Add tracing support; Fix some problems with hardwired sizesMichael Meissner1-9/+20
1996-09-10 * interp.c (hash): Make this an inline functionJeff Law1-14/+28
when compiling with GCC. Simplify. * simpos.c: Explicitly include "sys/syscall.h". Remove some #if 0'd code. Enable more emulated syscalls. Checking in more stuff.
1996-09-03Fix typpppoJeff Law1-1/+1
1996-09-03 * interp.c: OP should be an array of 32bit operands!Jeff Law1-13/+13
(v850_callback): Declare. (do_format_5): Fix extraction of OP[0]. (sim_size): Remove debugging printf. (sim_set_callbacks): Do something useful. (sim_stop_reason): Gross hacks to get c-torture running. * simops.c: Simplify code for computing targets of bCC insns. Invert 's' bit if 'ov' bit is set for some instructions. Fix 'cy' bit handling for numerous instructions. Make the simulator stop when a halt instruction is encountered. Very crude support for emulated syscalls (trap 0). * v850_sim.h: Include "callback.h" and declare v850_callback. Items in the operand array are 32bits. Fixes & syscall stuff.
1996-08-30 * interp.c: Remove various debugging printfs.Jeff Law1-15/+0
1996-08-30 * interp.c (hash): Fix.Jeff Law1-18/+19
* interp.c (do_format_8): Get operands correctly and call the target function. * simops.c: Rough cut at "clr1", "not1", "set1", and "tst1".
1996-08-30 * interp.c (do_format_4): Get operands correctly andJeff Law1-0/+6
call the target function. * simops.c: Rough cut at "sld.b", "sld.h", "sld.w", "sst.b", "sst.h", and "sst.w".
1996-08-30 * v850_sim.h: The V850 doesn't have split I&D spaces. ChangeJeff Law1-61/+40
accordingly. Remove many unused definitions. * interp.c: The V850 doesn't have split I&D spaces. Change accordingly. (get_longlong, get_longword, get_word): Deleted. (write_longlong, write_longword, write_word): Deleted. (get_operands): Deleted. (get_byte, get_half, get_word): New functions. (put_byte, put_half, put_word): New functions. * simops.c: Remove unused functions. Rough cut at "ld.b", "ld.h", "ld.w", "st.b", "st.h", "st.w" insns.
1996-08-30 * interp.c (do_format_5): Get operands correctly andJeff Law1-1/+7
call the target function. (sim_resume): Don't do a PC update for format 5 instructions. * simops.c: Handle "jarl" and "jmp" instructions.
1996-08-30 * interp.c (do_format_3): Get operands correctly and callJeff Law1-0/+5
the target function. * simops.c: Handle bCC instructions.
1996-08-29 * interp.c (hash): Update to be more accurate.Jeff Law1-41/+115
(lookup_hash): Call hash rather than computing the hash code here. (do_format_1_2): Handle format 1 and format 2 instructions. Get operands correctly and call the target function. (do_format_6): Get operands correctly and call the target function. (do_formats_9_10): Rough cut so shift ops will work. (sim_resume): Tweak to deal with format 1 and format 2 handling in a single funtion. Don't update the PC for format 3 insns. Fix typos. * simops.c: Slightly reorganize. Add condition code handling to "add", "addi", "and", "andi", "or", "ori", "xor", "xori" and "not" instructions. * v850_sim.h (reg_t): Registers are 32bits. (_state): The V850 has 32 general registers. Add a 32bit psw and pc register too. Add accessor macros Fixing lots of stuff. Starting to add condition code support. Basically check pointing the work to date.
1996-08-29 * ChangeLog, Makefile.in, configure, configure.in, v850_sim.h,Jeff Law1-0/+423
gencode.c, interp.c, simops.c: Created. So we've got something to hack on.
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