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2022-01-01Automatic Copyright Year update after running gdb/copyright.pyJoel Brobecker1-1/+1
This commit brings all the changes made by running gdb/copyright.py as per GDB's Start of New Year Procedure. For the avoidance of doubt, all changes in this commits were performed by the script.
2021-11-28sim: v850: switch to new target-newlib-syscallMike Frysinger1-2/+0
Use the new target-newlib-syscall module. This is needed to merge all the architectures into a single build, and v850 has a custom syscall table for its newlib/libgloss port. This allows cleaning up the syscall ifdef logic. We know these will always exist now.
2021-11-02sim: hoist mn10300 & v850 igen rules up to common buildsMike Frysinger1-67/+0
These rules don't depend on the target compiler settings, so hoist the build logic up to the common builds for better parallelization. We leave the mips rules in place as they depend on complicated arch-specific configure logic that needs to be untangled first.
2021-10-31sim: v850: delete old gencode logicMike Frysinger1-7/+2
The v850 port used to have a gencode helper, but it was deleted long ago. Clean up the settings that no longer make sense w/out it.
2021-10-31sim: igen: tighten up build outputMike Frysinger1-1/+1
Add a new stamp helper for quiet builds, and don't dump the command line options when it runs. That isn't standard tool behavior, and doesn't really seem necessary in any way.
2021-10-31sim: silence stamp touch rulesMike Frysinger1-1/+1
We pretty much never care about these stamp touches, so silence them. Also switch to using $@ when it makes sense.
2021-10-31sim: standardize move-if-change rulesMike Frysinger1-15/+15
Use the srcroot path and make them all silent.
2021-10-31sim: mips/v850: remove redundant variable setupMike Frysinger1-2/+0
The common/Make-common.in fragment already provides these variables.
2021-06-08sim: igen: harmonize tool variablesMike Frysinger1-2/+2
Separate the name of the igen program from the options used to run it. This allows us to avoid duplicating ../igen/igen in Makefiles and reuse the existing setting in the common Makefile. This also allows us to easily harmonize the use of EXEEXT between igen/local.mk and the common makefiles when cross-compiling for e.g. Windows.
2021-04-22Remove INCLUDE variable from some sim MakefilesTom Tromey1-2/+0
Some Makefiles in sim define INCLUDE but don't use it. This removes these instances. sim/bfin/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (INCLUDE): Remove. sim/m68hc11/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (INCLUDE): Remove. sim/mn10300/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (INCLUDE): Remove. sim/v850/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (INCLUDE): Remove.
2021-04-22Remove and modernize dependencies in simTom Tromey1-4/+0
Some spots in the sim build used manual dependencies, and some spots did a compilation by hand but did not use the automatic dependency tracking code. This patch fixes these spots. I didn't touch ppc, because it doesn't use the common Makefile code. I also didn't touch objects that are for the build machine, because automatic dependencies don't work for those. sim/arm/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (armemu26.o, armemu32.o): Use COMPILE and POSTCOMPILE. sim/bpf/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (arch.o, cpu.o, sim-if.o, traps.o): Remove. (mloop-le.o, mloop-be.o, decode-le.o, decode-be.o, sim-le.o) (sim-be.o): Use COMPILE and POSTCOMPILE. (SIM_EXTRA_DEPS): Add eng-le.h, eng-be.h. sim/cr16/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (SIM_EXTRA_DEPS): New variable. (simops.o): Remove. sim/cris/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (sim-if.o, dv-cris.o, dv-rv.o, arch.o, traps.o) (devices.o, crisv10f.o, mloopv10f.o, cpuv10.o, decodev10.o) (modelv10.o, crisv32f.o, mloopv32f.o, cpuv32.o, decodev32.o) (modelv32.o): Remove. (SIM_EXTRA_DEPS): Add engv10.h. sim/d10v/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (SIM_EXTRA_DEPS): New variable. (simops.o): Remove. sim/frv/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (arch.o, devices.o, frv.o, traps.o, pipeline.o) (interrupts.o, memory.o, cache.o, options.o, reset.o) (registers.o, profile.o, profile-fr400.o, profile-fr450.o) (profile-fr500.o, profile-fr550.o, sim-if.o, mloop.o, cpu.o) (decode.o, sem.o, model.o): Remove. (SIM_EXTRA_DEPS): Add eng.h. sim/iq2000/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (sim-if.o): Remove. (arch.o): Use COMPILE and POSTCOMPILE. (devices.o, iq2000.o, mloop.o, cpu.o, decode.o, sem.o, model.o): Remove. (SIM_EXTRA_DEPS): Add eng.h. sim/lm32/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (arch.o, traps.o, sim-if.o, lm32.o, mloop.o) (cpu.o, decode.o, sem.o, model.o): Remove. (SIM_EXTRA_DEPS): Add eng.h. sim/m32r/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (sim-if.o, arch.o, traps.o, traps-linux.o) (devices.o, m32r.o, mloop.o, cpu.o, decode.o, sem.o, model.o) (m32rx.o, mloopx.o, cpux.o, decodex.o, semx.o, modelx.o) (m32r2.o, mloop2.o, cpu2.o, decode2.o, sem2.o, model2.o): Remove. (SIM_EXTRA_DEPS): Add eng.h, engx.h, eng2.h. sim/m68hc11/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (interp.o): Remove. sim/mips/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (interp.o, m16run.o, micromipsrun.o, multi-run.o): Remove. (SIM_EXTRA_DEPS): New variable. sim/mn10300/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (interp.o): Remove. (idecode.o op_utils.o semantics.o): Remove. sim/or1k/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (mloop.o, arch.o, cpu.o, decode.o, sem.o) (sem-switch.o, model.o): Remove. sim/rl78/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (err.o, fpu.o, gdb-if.o, load.o, main.o, mem.o) (reg.o, rl78.o): Remove. sim/rx/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (err.o, fpu.o, gdb-if.o, load.o, main.o, mem.o) (misc.o, reg.o, rx.o, syscalls.o, trace.o): Remove. sim/sh/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (SIM_EXTRA_DEPS): New variable. (interp.o): Remove. sim/v850/ChangeLog 2021-04-22 Tom Tromey <tom@tromey.com> * Makefile.in (interp.o, simops.o, semantics.o): Remove.
2021-04-08sim: set ASAN_OPTIONS=detect_leaks=0 when running igen and opc2cSimon Marchi1-1/+1
The igen/dgen and opc2c tools leak their heap-allocated memory (on purpose) at program exit, which makes AddressSanitizer fail the tool execution. This breaks the build, as it makes the tool return a non-zero exit code. Fix that by disabling leak detection through the setting of that environment variable. I also changed the opc2c rules for m32c to go through a temporary file. What happened is that the failing opc2c would produce an incomplete file (probably because ASan exits the process before stdout is flushed). This meant that further make attempts didn't try to re-create the file, as it already existed. A "clean" was therefore necessary. This can also happen in regular builds if the user interrupts the build (^C) in the middle of the opc2c execution and tries to resume it. Going to a temporary file avoids this issue. sim/m32c/ChangeLog: * Makefile.in: Set ASAN_OPTIONS when running opc2c. sim/mips/ChangeLog: * Makefile.in: Set ASAN_OPTIONS when running igen. sim/mn10300/ChangeLog: * Makefile.in: Set ASAN_OPTIONS when running igen. sim/ppc/ChangeLog: * Makefile.in: Set ASAN_OPTIONS when running igen. sim/v850/ChangeLog: * Makefile.in: Set ASAN_OPTIONS when running igen. Change-Id: I00f21d4dc1aff0ef73471925d41ce7c23e83e082
2021-04-02sim: igen: merge build into top levelMike Frysinger1-4/+0
This simplifies the build a bit (especially for deps in port subdirs), and avoids recursive make. This in turn speeds up the build, and sets us up for multi-target.
2021-01-01Update copyright year range in all GDB filesJoel Brobecker1-1/+1
This commits the result of running gdb/copyright.py as per our Start of New Year procedure... gdb/ChangeLog Update copyright year range in copyright header of all GDB files.
2020-01-01Update copyright year range in all GDB files.Joel Brobecker1-1/+1
gdb/ChangeLog: Update copyright year range in all GDB files.
2019-01-01Update copyright year range in all GDB files.Joel Brobecker1-1/+1
This commit applies all changes made after running the gdb/copyright.py script. Note that one file was flagged by the script, due to an invalid copyright header (gdb/unittests/basic_string_view/element_access/char/empty.cc). As the file was copied from GCC's libstdc++-v3 testsuite, this commit leaves this file untouched for the time being; a patch to fix the header was sent to gcc-patches first. gdb/ChangeLog: Update copyright year range in all GDB files.
2018-01-02Update copyright year range in all GDB filesJoel Brobecker1-1/+1
gdb/ChangeLog: Update copyright year range in all GDB files
2017-01-01update copyright year range in GDB filesJoel Brobecker1-1/+1
This applies the second part of GDB's End of Year Procedure, which updates the copyright year range in all of GDB's files. gdb/ChangeLog: Update copyright year range in all GDB files.
2016-01-01GDB copyright headers update after running GDB's copyright.py script.Joel Brobecker1-1/+1
gdb/ChangeLog: Update year range in copyright notice of all files.
2015-12-27sim: unify sim-hloadMike Frysinger1-1/+0
Pretty much all targets are using this module already, so add it to the common list of objects. The only oddball out here is cris and that's because it supports loading via an offset for all the phdrs. We drop support for that.
2015-11-16sim: sim-stop/sim-reason/sim-reg: move to common obj listMike Frysinger1-3/+1
Now that all arches (for the most part) have moved over, move sim-stop.o, sim-reason.o, and sim-reg.o to the common object list and out of all the arch ports.
2015-04-15sim: unify sim-cpu usageMike Frysinger1-1/+0
Now that all the targets are utilizing CPU_PC_{FETCH,STORE}, and the cpu state is multicore, and the STATE_CPU defines match, we can move it all to the common code.
2015-04-13sim: v850: convert to sim-cpuMike Frysinger1-0/+1
Make cpu allocation fully dynamic so we can leverage the common sim-cpu and its APIs.
2015-04-06sim: move sim-engine.o/sim-hrw.o to the common listMike Frysinger1-2/+0
This makes these two objects available to all sims by default.
2015-03-14sim: make nrun the default run programMike Frysinger1-2/+0
We want people to stop using the run.c frontend, but it's hard to notice when it's still set as the default. Lets flip things so nrun.c is the default, and users of run.c will get an error by default. We turn that error into a warning for existing sims so we don't break them -- this is mostly meant for people starting new ports.
2015-01-01Update year range in copyright notice of all files owned by the GDB project.Joel Brobecker1-1/+1
gdb/ChangeLog: Update year range in copyright notice of all files.
2014-01-01Update Copyright year range in all files maintained by GDB.Joel Brobecker1-1/+1
2013-01-01Update years in copyright notice for the GDB files.Joel Brobecker1-1/+1
Two modifications: 1. The addition of 2013 to the copyright year range for every file; 2. The use of a single year range, instead of potentially multiple year ranges, as approved by the FSF.
2012-01-04Copyright year update in most files of the GDB Project.Joel Brobecker1-2/+1
gdb/ChangeLog: Copyright year update in most files of the GDB Project.
2011-01-01run copyright.sh for 2011.Joel Brobecker1-1/+1
2010-01-01Update copyright notices to add year 2010.Joel Brobecker1-1/+2
2009-01-14 Update the copyright notice of some of the files I missedJoel Brobecker1-1/+1
in the previous copyright update.
2008-01-01 Updated copyright notices for most files.Daniel Jacobowitz1-1/+1
2007-08-24 Switch the license of all files explicitly copyright the FSFJoel Brobecker1-5/+4
to GPLv3.
2007-02-20gdb/Daniel Jacobowitz1-2/+1
* MAINTAINERS: Disable -Werror for cris simulator. Build sparc64-solaris2.10 instead of the broken sparc-elf. * solib-frv.c: Include "solib.h". * Makefile.in (solib-frv.o): Update. * mt-tdep.c (mt_gdbarch_init): Correct typo in floatformats patch. * xtensa-tdep.c (xtensa_regset_from_core_section): Cast size_t to int. (xtensa_frame_this_id, xtensa_frame_prev_register) (xtensa_push_dummy_call): Use %p. sim/v850/ * Makefile.in (interp.o): Uncomment and update.
2007-01-09Copyright updates for 2007.Daniel Jacobowitz1-1/+1
2003-05-16Use $(SHELL) whenever we invoke move-if-change.Ian Lance Taylor1-15/+17
2002-08-29Makefile.in: Add gen-zero-r0 option.Nick Clifton1-0/+1
sim-main.h (GPR_SET, GPR_CLEAR): Define. simops.c (OP_24007E0): Sign extend the imm9 operand of a mul instruction.
2001-12-02* Makefile.in (simops.h, table.c): Delete targets.Andrew Cagney1-15/+1
(tmp-gencode, gencode.o, gencode): Delete targets. (simops.h): New file. ($(BUILT_SRC_FROM_IGEN)): Do not depend on simops.h. * gencode.c: Delete file.
2001-04-15* Makefile.in (simops.o): Add simops.h to dependency list.J.T. Conklin1-1/+1
2001-03-14Link with libintl, needed by libopcodes.Andrew Cagney1-2/+2
2001-02-01 * Makefile.in (gencode): Link with libopcodes in build tree ratherJonathan Larmour1-4/+2
than building source files from there.
1999-04-16Initial creation of sourceware repositorygdb-4_18-branchpointStan Shebs1-0/+142
1999-04-16Initial creation of sourceware repositoryStan Shebs1-140/+0
1998-11-25Fix --enable-build-warnings=-Werror failures.Andrew Cagney1-26/+6
v850/simops.c, d10v/simops.c, v850/Makefile.in, d10v/Makefile.in: Include targ-vals.h instead of syscall.h. Replace SYS_* with TARGET_SYS_*. Add dependency. z8k/support.c: Include <errno.h> v850/simops.c: Replace long with portable signed32. mips/interp.c: Make sim_monitor global - needed by sky.
1997-09-16Smooth some of ALU tracing's rough edges.Andrew Cagney1-1/+1
Fix switch insn.
1997-09-16Use trace_one_insn in trace functions. Buffer up trace data so thatAndrew Cagney1-1/+1
it is displayed in a single block.
1997-09-16Add v850e version of breakpoint instruction.Andrew Cagney1-0/+2
1997-09-15For instructions moved into v850.igen was computing (wrong) NIA whenAndrew Cagney1-0/+1
this wasn't needed.
1997-09-12Check reserved bits before executing instructions.Andrew Cagney1-1/+3
Make v850[eq] the the default simulator. Report illegal instructions. Include v850e instructions in v850eq.
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