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2018-10-05or1k: Add the l.muld, l.muldu, l.macu, l.msbu insnsRichard Henderson3-65/+61
Also fix the incorrect definitions of multiply and divide carry and overflow float. Changes to the instructions are made in the .cpu file, then we regenerate the binutils and sim files. The changes also required a few fixups for tests and additional sim helpers. cpu/ChangeLog: yyyy-mm-dd Richard Henderson <rth@twiddle.net> Stafford Horne <shorne@gmail.com> * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU. (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU. (l-mul): Fix overflow support and indentation. (l-mulu): Fix overflow support and indentation. (l-muld, l-muldu, l-msbu, l-macu): New instructions. (l-div); Remove incorrect carry behavior. (l-divu): Fix carry and overflow behavior. (l-mac): Add overflow support. (l-msb, l-msbu): Add carry and overflow support. opcodes/ChangeLog: yyyy-mm-dd Richard Henderson <rth@twiddle.net> Stafford Horne <shorne@gmail.com> * or1k-desc.c: Regenerate. * or1k-desc.h: Regenerate. * or1k-opc.c: Regenerate. * or1k-opc.h: Regenerate. * or1k-opinst.c: Regenerate. sim/common/ChangeLog: yyyy-mm-dd Stafford Horne <shorne@gmail.com> * cgen-ops.h (ADDCFDI): New function, add carry flag DI variant. (ADDOFDI): New function, add overflow flag DI variant. (SUBCFDI): New function, subtract carry flag DI variant. (SUBOFDI): New function, subtract overflow flag DI variant. sim/ChangeLog: yyyy-mm-dd Stafford Horne <shorne@gmail.com> * or1k/cpu.h: Regenerate. * or1k/decode.c: Regenerate. * or1k/decode.h: Regenerate. * or1k/model.c: Regenerate. * or1k/sem-switch.c: Regenerate. * or1k/sem.c: Regenerate: sim/testsuite/sim/or1k/ChangeLog: yyyy-mm-dd Stafford Horne <shorne@gmail.com> * div.S: Fix tests to match correct overflow/carry semantics. * mul.S: Likewise. gas/ChangeLog: yyyy-mm-dd Stafford Horne <shorne@gmail.com> * testsuite/gas/or1k/allinsn.s: Add instruction tests for l.muld, l.muldu, l.macu, l.msb, l.msbu. * testsuite/gas/or1k/allinsn.d: Add test results for new instructions.
2018-06-19Bump to autoconf 2.69 and automake 1.15.1Simon Marchi10-1011/+1301
When trying to run the update-gnulib.sh script in gdb, I get this: Error: Wrong automake version (Unescaped left brace in regex is deprecated, passed through in regex; marked by <-- HERE in m/\${ <-- HERE ([^ =:+{}]+)}/ at /opt/automake/1.11.1/bin/automake line 4113.), we need 1.11.1. Aborting. Apparently, it's an issue with a regex in automake that triggers a warning starting with Perl 5.22. It has been fixed in automake 1.15.1. So I think it's a good excuse to bump the versions of autoconf and automake used in the gnulib import. And to avoid requiring multiple builds of autoconf/automake, it was suggested that we bump the required version of those tools for all binutils-gdb. For autoconf, the 2.69 version is universally available, so it's an easy choice. For automake, different distros and distro versions have different automake versions. But 1.15.1 seems to be the most readily available as a package. In any case, it's easy to build it from source. I removed the version checks from AUTOMAKE_OPTIONS and AC_PREREQ, because I don't think they are useful in our case. They only specify a lower bound for the acceptable version of automake/autoconf. That's useful if you let the user choose the version of the tool they want to use, but want to set a minimum version (because you use a feature that was introduced in that version). In our case, we force people to use a specific version anyway. For the autoconf version, we have the check in config/override.m4 that enforces the version we want. It will be one less thing to update next time we change autotools version. I hit a few categories of problems that required some changes. They are described below along with the chosen solutions. Problem 1: configure.ac:17: warning: AM_INIT_AUTOMAKE: two- and three-arguments forms are deprecated. For more info, see: configure.ac:17: http://www.gnu.org/software/automake/manual/automake.html#Modernize-AM_005fINIT_005fAUTOMAKE-invocation Solution 1: Adjust the code based on the example at that URL. Problem 2 (in zlib/): Makefile.am: error: required file './INSTALL' not found Makefile.am: 'automake --add-missing' can install 'INSTALL' Makefile.am: error: required file './NEWS' not found Makefile.am: error: required file './AUTHORS' not found Makefile.am: error: required file './COPYING' not found Makefile.am: 'automake --add-missing' can install 'COPYING' Solution 2: Add the foreign option to AUTOMAKE_OPTIONS. Problem 3: doc/Makefile.am:20: error: support for Cygnus-style trees has been removed Solution 3: Remove the cygnus options. Problem 4: Makefile.am:656: warning: 'INCLUDES' is the old name for 'AM_CPPFLAGS' (or '*_CPPFLAGS') Solution 4: Rename "INCLUDES = " to "AM_CPPFLAGS += " (because AM_CPPFLAGS is already defined earlier). Problem 5: doc/Makefile.am:71: warning: suffix '.texinfo' for Texinfo files is discouraged; use '.texi' instead doc/Makefile.am: warning: Oops! doc/Makefile.am: It appears this file (or files included by it) are triggering doc/Makefile.am: an undocumented, soon-to-be-removed automake hack. doc/Makefile.am: Future automake versions will no longer place in the builddir doc/Makefile.am: (rather than in the srcdir) the generated '.info' files that doc/Makefile.am: appear to be cleaned, by e.g. being listed in CLEANFILES or doc/Makefile.am: DISTCLEANFILES. doc/Makefile.am: If you want your '.info' files to be placed in the builddir doc/Makefile.am: rather than in the srcdir, you have to use the shiny new doc/Makefile.am: 'info-in-builddir' automake option. Solution 5: Rename .texinfo files to .texi. Problem 6: doc/Makefile.am: warning: Oops! doc/Makefile.am: It appears this file (or files included by it) are triggering doc/Makefile.am: an undocumented, soon-to-be-removed automake hack. doc/Makefile.am: Future automake versions will no longer place in the builddir doc/Makefile.am: (rather than in the srcdir) the generated '.info' files that doc/Makefile.am: appear to be cleaned, by e.g. being listed in CLEANFILES or doc/Makefile.am: DISTCLEANFILES. doc/Makefile.am: If you want your '.info' files to be placed in the builddir doc/Makefile.am: rather than in the srcdir, you have to use the shiny new doc/Makefile.am: 'info-in-builddir' automake option. Solution 6: Remove the hack at the bottom of doc/Makefile.am and use the info-in-builddir automake option. Problem 7: doc/Makefile.am:35: error: required file '../texinfo.tex' not found doc/Makefile.am:35: 'automake --add-missing' can install 'texinfo.tex' Solution 7: Use the no-texinfo.tex automake option. We also have one in texinfo/texinfo.tex, not sure if we should point to that, or move it (or a newer version of it added with automake --add-missing) to top-level. Problem 8: Makefile.am:131: warning: source file 'config/tc-aarch64.c' is in a subdirectory, Makefile.am:131: but option 'subdir-objects' is disabled automake: warning: possible forward-incompatibility. automake: At least a source file is in a subdirectory, but the 'subdir-objects' automake: automake option hasn't been enabled. For now, the corresponding output automake: object file(s) will be placed in the top-level directory. However, automake: this behaviour will change in future Automake versions: they will automake: unconditionally cause object files to be placed in the same subdirectory automake: of the corresponding sources. automake: You are advised to start using 'subdir-objects' option throughout your automake: project, to avoid future incompatibilities. Solution 8: Use subdir-objects, that means adjusting references to some .o that will now be in config/. Problem 9: configure.ac:375: warning: AC_LANG_CONFTEST: no AC_LANG_SOURCE call detected in body ../../lib/autoconf/lang.m4:193: AC_LANG_CONFTEST is expanded from... ../../lib/autoconf/general.m4:2601: _AC_COMPILE_IFELSE is expanded from... ../../lib/autoconf/general.m4:2617: AC_COMPILE_IFELSE is expanded from... ../../lib/m4sugar/m4sh.m4:639: AS_IF is expanded from... ../../lib/autoconf/general.m4:2042: AC_CACHE_VAL is expanded from... ../../lib/autoconf/general.m4:2063: AC_CACHE_CHECK is expanded from... configure.ac:375: the top level Solution 9: Use AC_LANG_SOURCE, or use proper quoting. Problem 10 (in intl/): configure.ac:7: warning: AC_COMPILE_IFELSE was called before AC_USE_SYSTEM_EXTENSIONS /usr/share/aclocal/threadlib.m4:36: gl_THREADLIB_EARLY_BODY is expanded from... /usr/share/aclocal/threadlib.m4:29: gl_THREADLIB_EARLY is expanded from... /usr/share/aclocal/threadlib.m4:318: gl_THREADLIB is expanded from... /usr/share/aclocal/lock.m4:9: gl_LOCK is expanded from... /usr/share/aclocal/intl.m4:211: gt_INTL_SUBDIR_CORE is expanded from... /usr/share/aclocal/intl.m4:25: AM_INTL_SUBDIR is expanded from... /usr/share/aclocal/gettext.m4:57: AM_GNU_GETTEXT is expanded from... configure.ac:7: the top level Solution 10: Add AC_USE_SYSTEM_EXTENSIONS in configure.ac. ChangeLog: * libtool.m4: Use AC_LANG_SOURCE. * configure.ac: Remove AC_PREREQ, use AC_LANG_SOURCE. * README-maintainer-mode: Update version requirements. * ar-lib: New file. * test-driver: New file. * configure: Re-generate. bfd/ChangeLog: * Makefile.am (AUTOMAKE_OPTIONS): Remove 1.11. (INCLUDES): Rename to ... (AM_CPPFLAGS): ... this. * configure.ac: Remove AC_PREREQ. * doc/Makefile.am (AUTOMAKE_OPTIONS): Remove 1.9, cygnus, add info-in-builddir no-texinfo.tex. (info_TEXINFOS): Rename bfd.texinfo to bfd.texi. * doc/bfd.texinfo: Rename to ... * doc/bfd.texi: ... this. * Makefile.in: Re-generate. * aclocal.m4: Re-generate. * config.in: Re-generate. * configure: Re-generate. * doc/Makefile.in: Re-generate. binutils/ChangeLog: * configure.ac: Remove AC_PREREQ. * doc/Makefile.am (AUTOMAKE_OPTIONS): Remove cygnus, add info-in-builddir no-texinfo.tex. * Makefile.in: Re-generate. * aclocal.m4: Re-generate. * config.in: Re-generate. * configure: Re-generate. * doc/Makefile.in: Re-generate. config/ChangeLog: * override.m4 (_GCC_AUTOCONF_VERSION): Bump from 2.64 to 2.69. etc/ChangeLog: * configure.in: Remove AC_PREREQ. * configure: Re-generate. gas/ChangeLog: * Makefile.am (AUTOMAKE_OPTIONS): Remove 1.11, add subdir-objects. (TARG_CPU_O, OBJ_FORMAT_O, ATOF_TARG_O): Add config/ prefix. * configure.ac (TARG_CPU_O, OBJ_FORMAT_O, ATOF_TARG_O, emfiles, extra_objects): Add config/ prefix. * doc/as.texinfo: Rename to... * doc/as.texi: ... this. * doc/Makefile.am: Rename as.texinfo to as.texi throughout. Remove DISTCLEANFILES hack. (AUTOMAKE_OPTIONS): Remove 1.8, cygnus, add no-texinfo.tex and info-in-builddir. * Makefile.in: Re-generate. * aclocal.m4: Re-generate. * config.in: Re-generate. * configure: Re-generate. * doc/Makefile.in: Re-generate. gdb/ChangeLog: * common/common-defs.h (PACKAGE_NAME, PACKAGE_VERSION, PACKAGE_STRING, PACKAGE_TARNAME): Undefine. * configure.ac: Remove AC_PREREQ, add missing quoting. * gnulib/configure.ac: Modernize usage of AC_INIT/AM_INIT_AUTOMAKE. Remove AC_PREREQ. * gnulib/update-gnulib.sh (AUTOCONF_VERSION): Bump to 2.69. (AUTOMAKE_VERSION): Bump to 1.15.1. * configure: Re-generate. * config.in: Re-generate. * aclocal.m4: Re-generate. * gnulib/aclocal.m4: Re-generate. * gnulib/config.in: Re-generate. * gnulib/configure: Re-generate. * gnulib/import/Makefile.in: Re-generate. gdb/gdbserver/ChangeLog: * configure.ac: Remove AC_PREREQ, add missing quoting. * configure: Re-generate. * config.in: Re-generate. * aclocal.m4: Re-generate. gdb/testsuite/ChangeLog: * configure.ac: Remove AC_PREREQ. * configure: Re-generate. gold/ChangeLog: * configure.ac: Remove AC_PREREQ, add missing quoting and usage of AC_LANG_SOURCE. * Makefile.in: Re-generate. * aclocal.m4: Re-generate. * configure: Re-generate. * testsuite/Makefile.in: Re-generate. gprof/ChangeLog: * configure.ac: Remove AC_PREREQ. * Makefile.am: Remove DISTCLEANFILES hack. (AUTOMAKE_OPTIONS): Remove 1.11, add info-in-builddir. * Makefile.in: Re-generate. * aclocal.m4: Re-generate. * configure: Re-generate. * gconfig.in: Re-generate. intl/ChangeLog: * configure.ac: Add AC_USE_SYSTEM_EXTENSIONS, remove AC_PREREQ. * configure: Re-generate. * config.h.in: Re-generate. * aclocal.m4: Re-generate. ld/ChangeLog: * configure.ac: Remove AC_PREREQ. * Makefile.am: Remove DISTCLEANFILES hack, rename ld.texinfo to ld.texi, ldint.texinfo to ldint.texi throughout. (AUTOMAKE_OPTIONS): Add info-in-builddir. * README: Rename ld.texinfo to ld.texi, ldint.texinfo to ldint.texi throughout. * gen-doc.texi: Likewise. * h8-doc.texi: Likewise. * ld.texinfo: Rename to ... * ld.texi: ... this. * ldint.texinfo: Rename to ... * ldint.texi: ... this. * Makefile.in: Re-generate. * aclocal.m4: Re-generate. * config.in: Re-generate. * configure: Re-generate. libdecnumber/ChangeLog: * configure.ac: Remove AC_PREREQ. * configure: Re-generate. * aclocal.m4. libiberty/ChangeLog: * configure.ac: Remove AC_PREREQ. * configure: Re-generate. * config.in: Re-generate. opcodes/ChangeLog: * Makefile.am (AUTOMAKE_OPTIONS): Remove 1.11. * configure.ac: Remove AC_PREREQ. * Makefile.in: Re-generate. * aclocal.m4: Re-generate. * configure: Re-generate. readline/ChangeLog.gdb: * configure: Re-generate. * examples/rlfe/configure: Re-generate. sim/ChangeLog: * All configure.ac: Remove AC_PREREQ. * All configure: Re-generate. zlib/ChangeLog.bin-gdb: * configure.ac: Modernize AC_INIT call, remove AC_PREREQ. * Makefile.am (AUTOMAKE_OPTIONS): Remove 1.8, cygnus, add foreign. * Makefile.in: Re-generate. * aclocal.m4: Re-generate. * configure: Re-generate.
2018-06-18config: Sync with GCCSimon Marchi1-1/+0
... and re-generate all possible configure files, since they may depend on things in config/. config/ChangeLog: Sync with GCC 2018-06-08 Martin Liska <mliska@suse.cz> * bootstrap-mpx.mk: Remove. 2018-05-10 Martin Liska <mliska@suse.cz> PR bootstrap/64914 * bootstrap-ubsan.mk: Define UBSAN_BOOTSTRAP. 2018-05-09 Joshua Watt <jpewhacker@gmail.com> * ax_pthread.m4: Add file. 2018-05-08 Richard Biener <rguenther@suse.de> PR bootstrap/85571 * bootstrap-lto-noplugin.mk: Disable compare. * bootstrap-lto.mk: Supply contrib/compare-lto for do-compare. 2018-04-24 H.J. Lu <hongjiu.lu@intel.com> PR bootstrap/85490 * bootstrap-cet.mk (STAGE4_CFLAGS): New. 2018-04-24 H.J. Lu <hongjiu.lu@intel.com> PR target/85485 * bootstrap-cet.mk (STAGE2_CFLAGS): Remove -mcet. (STAGE3_CFLAGS): Likewise. 2018-04-24 H.J. Lu <hongjiu.lu@intel.com> PR target/85485 * cet.m4 (GCC_CET_FLAGS): Replace -mcet with -mshstk. 2018-04-19 Jakub Jelinek <jakub@redhat.com> * cet.m4 (GCC_CET_FLAGS): Default to --disable-cet, replace --enable-cet=default with --enable-cet=auto. 2018-04-18 David Malcolm <dmalcolm@redhat.com> PR jit/85384 * acx.m4 (GCC_BASE_VER): Remove \$\$ from sed expression.
2018-01-02Update copyright year range in all GDB filesJoel Brobecker45-45/+45
gdb/ChangeLog: Update copyright year range in all GDB files
2017-12-12sim: testsuite: add testsuite for or1k simPeter Gavin28-0/+6510
This is the testsuite for the or1k sim, it tests running many of the basic architecture instructions on the openrisc sim. sim/testsuite/sim/or1k/ChangeLog: 2017-12-12 Peter Gavin <pgavin@gmail.com> Stafford Horne <shorne@gmail.com> * add.S: New file. * alltests.exp: New file. * and.S: New file. * basic.S: New file. * div.S: New file. * ext.S: New file. * find.S: New file. * flag.S: New file. * fpu.S: New file. * jump.S: New file. * load.S: New file. * mac.S: New file. * mfspr.S: New file. * mul.S: New file. * or.S: New file. * or1k-asm-test-env.h: New file. * or1k-asm-test-helpers.h: New file. * or1k-asm-test.h: New file. * or1k-asm.h: New file. * or1k-test.ld: New file. * ror.S: New file. * shift.S: New file. * spr-defs.h: New file. * sub.S: New file. * xor.S: New file. sim/testsuite/ChangeLog: 2017-12-12 Stafford Horne <shorne@gmail.com> Peter Gavin <pgavin@gmail.com> * configure: Regenerated.
2017-04-22Fix ldn/stn multiple instructions. Fix testcases with unaligned data.Jim Wilson12-14/+341
sim/aarch64/ * simulator.c (vec_load): Add M argument. Rewrite to iterate over registers based on structure size. (LD4, LD3, LD2, LD1_2, LD1_3, LD1_4): Pass new arg to vec_load. (LD1_1): Replace with call to vec_load. (vec_store): Add new M argument. Rewrite to iterate over registers based on structure size. (ST4, ST3, ST2, ST1_2, ST1_3, ST1_4): Pass new arg to vec_store. (ST1_1): Replace with call to vec_store. sim/testsuite/sim/aarch64/ * fcvtz.s, fstur.s, ldn_single.s, ldnr.s, mla.s, mls.s, uzp.s: Align data. * sumulh.s: Delete unnecessary data alignment. * stn_single.s: Align data. Fix unaligned ldr insns. Adjust cmp arguments to match change. * ldn_multiple.s, stn_multiple.s: New.
2017-04-08Add support for fcvtl and fcvtl2.Jim Wilson2-0/+61
sim/aarch64/ * simulator.c (do_vec_FCVTL): New. (do_vec_op1): Call do_vec_FCVTL. sim/testsuite/sim/aarch64/ * fcvtl.s: New.
2017-04-08Support the fcmXX zero instructions.Jim Wilson2-0/+81
sim/aarch64/ * simulator.c (do_scalar_FCMGE_zero): New. (do_scalar_FCMLE_zero, do_scalar_FCMGT_zero, do_scalar_FCMEQ_zero) (do_scalar_FCMLT_zero): Likewise. (do_scalar_vec): Add calls to new functions. sim/testsuite/sim/aarch64/ * fcmXX.s: New.
2017-03-25Fix bug with cmn/adds where C flag was incorrectly set.Jim Wilson2-0/+21
sim/aarch64/ * simulator.c (set_flags_for_add32): Cast result to uint32_t in carry flag check. sim/testsuite/sim/aarch64/ * adds.s: Add checks for values -2 and 1, where C is not set.
2017-03-03Fix umulh and smulh bugs. Fix bugs in last week's sumov.s testsuite.Jim Wilson3-5/+68
sim/aarch64/ * simulator.c (mul64hi): Shift carry left by 32. (smulh): Change signum to negate. If negate, invert result, and add carry bit if low part of multiply result is zero. sim/testsuite/sim/aarch64/ * sumov.s: Correct compare test values. * sumulh.s: New.
2017-02-25Add missing smov support, and clean up existing umov support.Jim Wilson2-0/+93
sim/aarch64/ * simulator.c (do_vec_SMOV_into_scalar): New. (do_vec_UMOV_into_scalar): Renamed from do_vec_MOV_into_scalar. Rewritten. (do_vec_UMOV): Merged into do_vec_UMOV_into_scalar and deleted. (do_vec_op1): Move do_vec_TRN call and do_vec_UZP call. Add do_vec_SMOV_into_scalar call. Delete do_vec_MOV_into_scalar and do_vec_UMOV calls. Add do_vec_UMOV_into_scalar call. sim/testsuite/sim/aarch64/ * sumov.s: New.
2017-02-25Add missing cnt (popcount) instruction support.Jim Wilson2-0/+37
sim/aarch64/ * simulator.c (popcount): New. (do_vec_CNT): New. (do_vec_op1): Add do_vec_CNT call. sim/testsuite/sim/aarch64/ * cnt.s: New.
2017-02-19Fix for aarch64 sim sxtl/uxtl insns, plus another fix for addv.Jim Wilson6-19/+126
sim/aarch64/ * simulator.c (do_vec_ADDV): Mov val declaration inside each case, with type set to input type size. (do_vec_xtl): Change bias from 3 to 4 for byte case. sim/testsuite/sim/aarch64/ * bit.s: Change cmp immediates to account for addv bug fix. * cmtst.s, ldn_single.s, stn_single.s: Likewise. * xtl.s: New.
2017-02-14Add self to aarch64 maintainers. Fix mla instruction.Jim Wilson2-0/+105
sim/ * MAINTAINTERS (aarch64): Add myself. sim/aarch64/ * simulator.c (do_vec_MLA): Rewrite switch body. sim/testsuite/sim/aarch64/ * mla.s: New.
2017-02-14Fix bit/bif instructions.Jim Wilson2-0/+93
sim/aarch64/ * simulator.c (do_vec_bit): Change loop limits from 16 and 8 to 4 and 2. Move test_false if inside loop. Fix logic for computing result stored to vd. sim/testsuite/sim/aarch64 * bit.s: New.
2017-02-14Add ldn/stn single support, fix ldnr support.Jim Wilson4-0/+404
sim/aarch64/ * simulator.c: (LDn_STn_SINGLE_LANE_AND_SIZE): New. (do_vec_LDn_single, do_vec_STn_single): New. (do_vec_LDnR): Add and set new nregs var. Replace switch on nregs with loop over nregs using new var n. Add n times size to address in loop. Add n to vd in loop. (do_vec_load_store): Add comment for instruction bit 24. New var single to hold instruction bit 24. Add new code to use single. Move ldnr support inside single if statements. Fix ldnr register counts inside post if statement. Change HALT_NYI calls to HALT_UNALLOC. sim/testsuite/sim/aarch64/ * ldn_single.s: New. * ldnr.s: New. * stn_single.s: New.
2017-01-23Add support for cmtst.Jim Wilson2-0/+108
sim/aarch64/ * simulator.c (do_vec_compare): Add case 0x23 for CMTST. sim/testsuite/sim/aarch64/ * cmtst.s: New.
2017-01-17Fixes for addv and xtn2 instructions.Jim Wilson3-0/+134
sim/aarch64/ * simulator.c (do_vec_ADDV): Call aarch64_set_vec_u64 instead of aarch64_set_reg_u64. In case 2, call HALT_UNALLOC if not full. In case 3, call HALT_UNALLOC unconditionally. (do_vec_XTN): Delete shifts. In case 2, change index from i + 4 to i + 2. Delete if on bias, change index to i + bias * X. sim/testsuite/sim/aarch64/ * addv.s: New. * xtn.s: New.
2017-01-09Fix problems with the implementation of the uzp1 and uzp2 instructions.Jim Wilson2-0/+218
sim/aarch64/ * simulator.c (do_vec_UZP): Rewrite. sim/testsuite/sim/aarch64/ * uzp.s: New.
2017-01-04Five fixes, for fcsel, fcvtz, fminnm, mls, and non-widening mul.Jim Wilson6-0/+547
sim/aarch64/ * cpustate.c: Include math.h. (aarch64_set_FP_float): Use signbit to check for signed zero. (aarch64_set_FP_double): Likewise. * simulator.c (do_vec_MOV_immediate, case 0x8): Add missing break. (do_vec_mul): In all DO_VEC_WIDENING_MUL calls, make second and fourth args same size as third arg. (fmaxnm): Use isnan instead of fpclassify. (fminnm, dmaxnm, dminnm): Likewise. (do_vec_MLS): Reverse order of subtraction operands. (dexSimpleFPCondSelect): Call aarch64_get_FP_double or aarch64_get_FP_float to get source register contents. (UINT_MIN, ULONG_MIN, FLOAT_UINT_MAX, FLOAT_UINT_MIN, DOUBLE_UINT_MAX, DOUBLE_UINT_MIN, FLOAT_ULONG_MAX, FLOAT_ULONG_MIN, DOUBLE_ULONG_MAX, DOUBLE_ULONG_MIN): New. (do_fcvtzu): Use ULONG instead of LONG, and UINT instead of INT in raise_exception calls. sim/testsuite/sim/aarch64/ * fcsel.s: New. * fcvtz.s: New. * fminnm.s: New. * mls.s: New. * mul.s: New.
2017-01-01update copyright year range in GDB filesJoel Brobecker20-20/+20
This applies the second part of GDB's End of Year Procedure, which updates the copyright year range in all of GDB's files. gdb/ChangeLog: Update copyright year range in all GDB files.
2016-12-21Fix bugs with float compare and Inf operands.Jim Wilson2-0/+150
sim/aarch64/ * simulator.c (set_flags_for_float_compare): Add code to handle Inf. Add comment to document NaN issue. (set_flags_for_double_compare): Likewise. sim/testsuite/sim/aarch64/ * fcmp.s: New.
2016-12-13Fix aarch64 sim bug with adds64, and add testcases for last 3 bug fixes.Jim Wilson5-9/+288
sim/aarch64 * simulator.c (NEG, POS): Move before set_flags_for_add64. (set_flags_for_add64): Replace with a modified copy of set_flags_for_sub64. sim/testsuite/sim/aarch64 * testutils.inc (pass): Move .Lpass to start. (fail): Move .Lfail to start. Return 1 instead of 0. (start): Moved .Lpass and .Lfail to here. * adds.s: New. * fstur.s: New. * tbnz.s: New.
2016-01-10sim: drop --enable-sim-cflags optionMike Frysinger2-5/+4
No other sub directory provides such a configuration option, so drop it from the sim dir as well. This cleans up a good bit of code in the process. If people want to use custom flags for just the sim, they can still run configure+make by hand in the sim subdir and use the normal CFLAGS settings.
2016-01-06Change copyright owner to FSF in sim/testsuite/sim/mips/hilo-hazard-4.sJoel Brobecker2-2/+5
sim/testsuite/sim/mips/ChangeLog: * hilo-hazard-4.s: Change copyright ownder to FSF.
2016-01-05Fix the execution of the MSP430 simulator testsuite.Nick Clifton2-2/+38
ld * emulparams/msp430elf.sh (RAM_START): Move to 0x500 - above the MSP430 hardware multiply address range. * scripttempl/elf32msp430.sc (__romdatastart): Define. (__romdatacopysize): Define. * scripttempl/elf32msp430_3.sc: Likewise. tests * testutils.inc (__pass): Use the LMA addresses of the _passmsg symbol. (__fail): Likewise.
2016-01-04sim: parse_args: polish getopt error messageMike Frysinger3-2/+7
The cris sim hit a few failures after the recent getopt logic, and the expected output showed a few ways we can improve things to better match other utils.
2016-01-03sim: convert to bfd_endianMike Frysinger2-1/+6
Rather than re-invent endian defines, as well as maintain our own list of OS & arch-specific includes, punt all that logic in favor of the bfd ones already set up and maintained elsewhere. We already rely on the bfd library, so leveraging the endian aspect should be fine.
2016-01-01GDB copyright headers update after running GDB's copyright.py script.Joel Brobecker19-19/+19
gdb/ChangeLog: Update year range in copyright notice of all files.
2015-12-25sim: cris: migrate from WITH_DEVICES to WITH_HWMike Frysinger2-1/+5
The cris port was using the device framework to handle two addresses when the --cris-900000xx flag was specified. That can be implemented using the newer hardware framework instead which allows us to drop the device logic entirely, as well as delete the tconfig.h file. Basically we create a new cris_900000xx device model and move the read logic out of devices.c and into that. The rest of the devices logic was callback to the hardware framework already.
2015-12-25sim: cris: set up sane default path to rvdummyMike Frysinger2-1/+14
Much like we autodetect the path to the run program when there is none set explicitly, do the same for the rvdummy program. Otherwise the default make check fails to execute the helper properly.
2015-12-24sim: make LMA loading the default for all targetsMike Frysinger3-1/+25
Most targets already default to loading code via their LMA, but for a few, this means the default changes from loading VMA to LMA. It's better to have the different targets be consistent, and allows some code clean up.
2015-11-24Add an AArch64 simulator to GDB.Nick Clifton6-0/+105
sim * configure.tgt: Add aarch64 entry. * configure: Regenerate. * sim/aarch64/configure.ac: New configure template. * sim/aarch64/aclocal.m4: Generate. * sim/aarch64/config.in: Generate. * sim/aarch64/configure: Generate. * sim/aarch64/cpustate.c: New file - functions for accessing AArch64 registers. * sim/aarch64/cpustate.h: New header. * sim/aarch64/decode.h: New header. * sim/aarch64/interp.c: New file - interface between GDB and simulator. * sim/aarch64/Makefile.in: New makefile template. * sim/aarch64/memory.c: New file - functions for simulating aarch64 memory accesses. * sim/aarch64/memory.h: New header. * sim/aarch64/sim-main.h: New header. * sim/aarch64/simulator.c: New file - aarch64 simulator functions. * sim/aarch64/simulator.h: New header. include/gdb * sim-aarch64.h: New file. sim/test * configure: Regenerate. * sim/aarch64: New directory.
2015-11-15sim: mcore: add a fail testcaseMike Frysinger3-1/+14
2015-11-15sim: m32c: add a basic testsuiteMike Frysinger5-0/+92
2015-11-15sim: testsuite: support basic vars in flagsMike Frysinger2-1/+12
Sometimes in tests, we need supplemental files like linker scripts or board helper files. There's no way to set those flags in the tests currently and relative paths don't work (breaks out of tree builds). Update the main option parser to replace some strings on the fly. Now tests can do things like: Long term we'll want to switch the framework to use the dejagnu helpers like dg-xxx that gcc & gdb utilize. But that'll require more rework.
2015-11-10sim: m32c: move test code to testsuiteMike Frysinger6-0/+167
Various target code belongs in the testsuite/ subdir, so move the m32c code to match all the other targets.
2015-10-12sim: ft32: test coverage for link parameters and PM write portJames Bowman2-0/+42
Adds test coverage for recent features.
2015-10-11sim: bfin: handle negative left saturated shifts as ashifts [BZ #18407]Mike Frysinger2-0/+22
When handling left saturated ashifts with negative immediates, they should be treated as right ashifts. This matches hardware behavior. Reported-by: Igor Rayak <igorr@gitatechnologies.com>
2015-09-25[PATCH] Add micromips support to the MIPS simulatorAndrew Bennett4-6/+77
2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com> Ali Lown <ali.lown@imgtec.com> sim/common/ * sim-bits.h (EXTEND6): New macro. (EXTEND12): New macro. (EXTEND25): New macro. sim/mips/ * Makefile.in (tmp-micromips): New rule. (tmp-mach-multi): Add support for micromips. * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim that works for both mips64 and micromips64. (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and micromips32. Add build support for micromips. * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc, do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv, do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu, do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv, do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append, do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions. Refactored instruction code to use these functions. * dsp2.igen: Refactored instruction code to use the new functions. * interp.c (decode_coproc): Refactored to work with any instruction encoding. (isa_mode): New variable (RSVD_INSTRUCTION): Changed to 0x00000039. * m16.igen (BREAK16): Refactored instruction to use do_break16. (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models. * micromips.dc: New file. * micromips.igen: New file. * micromips16.dc: New file. * micromipsdsp.igen: New file. * micromipsrun.c: New file. * mips.igen (do_swc1): Changed to work with any instruction encoding. (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc, do_scd do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu, do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt, do_add_fmt do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1, do_cvt_d_fmt do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl, do_cvt_s_pu do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt, do_luxc1_32 do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b, do_mov_fmt, do_movtf do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt, do_mtc1b, do_mul_fmt do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps, do_plu_ps, do_pul_ps do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt, do_prefx, do_sdc1 do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt, do_swc1, do_swxc1 do_trunc_fmt): New functions, refactored from existing instructions. Refactored instruction code to use these functions. (RSVD): Changed to use new reserved instruction. (loadstore_ea, not_word_value, unpredictable, check_mt_hilo, check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32, do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double, do_store_double): Added micromips32 and micromips64 models. Added include for micromips.igen and micromipsdsp.igen Add micromips32 and micromips64 models. (DecodeCoproc): Updated to use new macro definition. * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di, do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu, do_seb, do_seh do_rdhwr, do_wsbh): New functions. Refactored instruction code to use these functions. * sim-main.h (CP0_operation): New enum. (DecodeCoproc): Updated macro. (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE, MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16, MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and ISA_MODE_MICROMIPS): New defines. (sim_state): Add isa_mode field. sim/testsuite/sim/mips/ * basic.exp (run_micromips_test, run_sim_tests): New functions Add support for micromips tests. * hilo-hazard-4.s: New file. * testutils.inc (_dowrite): Changed reserved instruction encoding. (writemsg): Moved the la and li instructions before the data they are assigned to, which prevents a bug where MIPS32 relocations are used instead of micromips relocations when building for micromips.
2015-07-24Remove leading/trailing white spaces in ChangeLogH.J. Lu7-25/+25
2015-04-13Do unset_currtarget_info ldscript for all simulator testsuites.Hans-Peter Nilsson4-6/+18
sim/testsuite: * sim-defs.exp (sim_init): Unset target ldscript here. sim/testsuite/sim/mips: * basic.exp: Don't unset target ldscript here.
2015-04-05sim: moxie: fix running after nrun conversionMike Frysinger4-0/+71
The nrun conversion was slightly incorrect in how it stopped when an exception occurred. We still set cpu.asregs.exception, but nothing was checking it anymore. Convert all of that to sim_engine_halt. To keep things from regressing again, add a basic testsuite too.
2015-04-05sim: mn10300: add a basic testsuiteMike Frysinger4-0/+88
2015-04-05sim: m68hc11: add a basic testsuiteMike Frysinger4-0/+78
2015-04-05sim: iq2000: add a basic testsuiteMike Frysinger4-0/+78
2015-04-05sim: lm32: add a basic testsuiteMike Frysinger4-0/+84
2015-03-30sim: d10v: convert to nrunMike Frysinger2-1/+5
A lot of cpu state is stored in global variables, as is memory handling. The sim_size support needs unwinding at some point. But at least this is an improvement on the status quo.
2015-03-30sim: d10v: link in missing testsuiteMike Frysinger3-3/+16
Looks like historical restructuring in this dir lost the d10v-elf subdir and no one noticed in the meantime. Re-add it to the testsuite. There are some failures, but better some tests get run than none at all.
2015-03-29sim: cr16: add _start symbol to tests [BZ #12385]Mike Frysinger2-0/+7
The current cr16 testsuite sets up _START, but the linker looks for the _start symbol. Add the latter as an alias to the former.
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