aboutsummaryrefslogtreecommitdiff
path: root/sim/testsuite
AgeCommit message (Collapse)AuthorFilesLines
2014-03-10sim: msp430: start a test frameworkMike Frysinger6-0/+113
The current sim lacks any sort of tests. Start a basic framework and add a simple one to test the add insn.
2014-03-04sim: convert old style prototypesMike Frysinger2-5/+7
Most of these prototypes have been killed off, but we have a few left in the sim tree. Clean them up so we can enable the -W flag for it.
2014-01-01Update Copyright year range in all files maintained by GDB.Joel Brobecker14-14/+14
2013-12-07sim: bfin: tests: make run-tests.sh executableMike Frysinger2-0/+4
I meant for this script to be +x, but missed when doing the initial CVS commit. It wasn't possible to fix w/CVS, but it is w/git, so do it. Signed-off-by: Mike Frysinger <vapier@gentoo.org> 2012-12-03 Mike Frysinger <vapier@gentoo.org> * run-tests.sh: Add +x file mode.
2013-09-23Regenerate sim configure files to pick up support for powerpc64le inAlan Modra2-0/+7
libtool.m4.
2013-06-24sim: bfin: run-tests.sh: fix typo in usage exitMike Frysinger2-1/+5
2013-06-24sim: bfin: se_all32bitopcodes: skip debug insns under the simMike Frysinger2-1/+18
Since the sim has a few fake debug insns that the hardware does not, we need to check for those before attempting to run them. Otherwise we'll randomly trigger the sim debug asserts/aborts/halts insns. On the hardware, these are proper invalid insns, and the table catches that.
2013-06-24sim: bfin: speed up all insn testcases slightlyMike Frysinger2-2/+8
The main body of the "all insn" test is executed once per tested insn, and we test millions of insns here. Any shrinkage we can do in this loop will speed things up nicely (since it's multiplied per tested insn). To that end, simplify the end-of-table test into one less insn, and omit the SSYNC when we build for the sim. When we build to run on the hardware, this insn matters, but the sim doesn't have write store buffers in the chip that might get in the way (memory writes are atomic).
2013-06-23sim: bfin: trim trailing whitespaceMike Frysinger2-1/+5
2013-06-17sim: bfin: tweak run-tests for parallel usageMike Frysinger2-6/+34
2013-06-17sim: bfin: add helpful info for generating test tablesMike Frysinger2-0/+23
2013-06-17sim: bfin: drop RET[ENI] setupMike Frysinger2-3/+4
Since these insns run in usermode, there should be no need to setup RET[ENI] to safe values. They won't be dereferenced, and any insn that returns via them are valid only in supervisor mode. Since this is in the main exception code path, saving any insn at all is good as it gets multiplied quickly (as in O(n^2) times). Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-05-15sim: arm: add support for MOVW and MOVT instructionsMike Frysinger2-0/+58
From: Jayant R. Sonar <Jayant.Sonar@kpitcummins.com> This patch adds simulator support for handling the armv7 instructions 'movw (immediate)' and 'movt'. Compiler frequently use these instructions to load the 32bit addresses of global variables, string pointers etc. into the general registers. In absence of support of these instructions: 1. GDB run simulator fails to print even simple "hello world" string on console. 2. Loading of global variable addresses into the registers fail causing arithmetic operation failures. Patch has been regression tested for arm-none-eabi (-march=armv7-a).
2013-01-01Update years in copyright notice for the GDB files.Joel Brobecker14-14/+14
Two modifications: 1. The addition of 2013 to the copyright year range for every file; 2. The use of a single year range, instead of potentially multiple year ranges, as approved by the FSF.
2012-12-19[sim] Update old contact info in GPL license noticesJoel Brobecker1-2/+1
sim/ChangeLog: Update old contact info in GPL license notices.
2012-12-19Update sim copyright headers from GPLv2-or-later to GPLv3-or-later.Joel Brobecker1-1/+1
gdb/sim/ChangeLog: Update the non-FSF-copyrighted files in sim to GPLv3 or later.
2012-11-20Fix sim build when configured with --enable-pluginsH.J. Lu1-1/+1
* common/Make-common.in: Use lt_cv_dlopen_libs under PLUGINS condition. * common/acinclude.m4: Define lt_cv_dlopen_libs. * arm/configure: Regenerate. * avr/configure: Regenerate. * bfin/configure: Regenerate. * common/configure: Regenerate. * cr16/configure: Regenerate. * cris/configure: Regenerate. * d10v/configure: Regenerate. * erc32/configure: Regenerate. * frv/configure: Regenerate. * h8300/configure: Regenerate. * igen/configure: Regenerate. * iq2000/configure: Regenerate. * lm32/configure: Regenerate. * m32c/configure: Regenerate. * m32r/configure: Regenerate. * m68hc11/configure: Regenerate. * mcore/configure: Regenerate. * microblaze/configure: Regenerate. * mips/configure: Regenerate. * mn10300/configure: Regenerate. * moxie/configure: Regenerate. * ppc/configure: Regenerate. * rl78/configure: Regenerate. * rx/configure: Regenerate. * sh/configure: Regenerate. * sh64/configure: Regenerate. * testsuite/configure: Regenerate. * v850/configure: Regenerate.
2012-09-242012-09-24 Steve Ellcey <sellcey@mips.com>Steve Ellcey1-1/+1
* mips/basic.exp: Add mips*-mti-elf* target. * configure.ac: Add mips*-mti-elf* target. * configure: Regenerate.
2012-06-15Define PACKAGE macro in all sims' config.h.Joel Brobecker2-1/+5
Some of the common includes in include/gdb such as callback.h include bfd.h. But there was a recent change in bfd-in.h to require that config.h be included before bfd.h can be included: /* PR 14072: Ensure that config.h is included first. */ #if !defined PACKAGE && !defined PACKAGE_VERSION #error config.h must be included before this header #endif PACKAGE_VERSION is always defined by default by the AC_INIT autoconf macro, but PACKAGE isn't. This patch updates the SIM_AC_COMMON macro to define it, and then regenerates all configure scripts and config.in files. sim/common/changeLog: * acinclude.m4 (SIM_AC_COMMON): Define PACKAGE. * config.in, configure: Regenerate. sim/ChangeLog: * configure: Regenerate. sim/arm/ChangeLog: * config.in, configure: Regenerate. sim/avr/ChangeLog: * config.in, configure: Regenerate. sim/bfin/ChangeLog: * config.in, configure: Regenerate. sim/cr16/ChangeLog: * config.in, configure: Regenerate. sim/cris/ChangeLog: * config.in, configure: Regenerate. sim/d10v/ChangeLog: * config.in, configure: Regenerate. sim/erc32/ChangeLog: * config.in, configure: Regenerate. sim/frv/ChangeLog: * config.in, configure: Regenerate. sim/h8300/ChangeLog: * config.in, configure: Regenerate. sim/iq2000/ChangeLog: * config.in, configure: Regenerate. sim/lm32/ChangeLog: * config.in, configure: Regenerate. sim/m32c/ChangeLog: * config.in, configure: Regenerate. sim/m32r/ChangeLog: * config.in, configure: Regenerate. sim/m68hc11/ChangeLog: * config.in, configure: Regenerate. sim/mcore/ChangeLog: * config.in, configure: Regenerate. sim/microblaze/ChangeLog: * config.in, configure: Regenerate. sim/mips/ChangeLog: * config.in, configure: Regenerate. sim/mn10300/ChangeLog: * config.in, configure: Regenerate. sim/moxie/ChangeLog: * config.in, configure: Regenerate. sim/ppc/ChangeLog: * configure: Regenerate. sim/rl78/ChangeLog: * config.in, configure: Regenerate. sim/rx/ChangeLog: * config.in, configure: Regenerate. sim/sh/ChangeLog: * config.in, configure: Regenerate. sim/sh64/ChangeLog: * config.in, configure: Regenerate. sim/v850/ChangeLog: * config.in, configure: Regenerate. sim/testsuite/ChangeLog: * configure: Regenerate.
2012-04-09sim: bfin: add shift astat testsMike Frysinger4-0/+777
These are randomly generated tests to track down issues in ASTAT handling with shift insns. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09sim: bfin: more astat testsMike Frysinger3-0/+397
These are the randomly generated tests that directed some of the recent astat related fixes. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09sim: bfin: enable some parallel testsMike Frysinger5-4/+7
Now that we check for valid sub-insns in parallel insns, we can enable the tests that explicitly validate those code paths. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09sim: bfin: unify se_all helpers moreMike Frysinger7-54/+64
Now that we have the se_all helpers together and working, we can see what pieces are duplicated in each test and unify them in the common header file. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-25sim: bfin: skip .c/.S tests if no compiler is availableMike Frysinger2-0/+34
Similar to logic in the cris exp, attempt a simple compile and if it fails (presumably due to the compiler being broken), skip all the related tests. Fortunately, most tests (~600 out of ~800) are pure assembly, so people should still get pretty good coverage. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-25sim: bfin: disable redundant test that makes 32bit gas angryMike Frysinger2-1/+7
2012-03-25sim: bfin: fix typos in large constants in testsMike Frysinger6-5/+13
Truncate constants that are larger than 32bits but get loaded into 32bit registers. These high bits don't get used and don't really make sense.
2012-03-24sim: testsuite: regen configure after rl78 additionMike Frysinger1-0/+4
2012-03-24sim: cris: update testsuite output after strsignal changeMike Frysinger25-24/+33
2012-03-23sim: testsuite: regen configure after rl78 additionMike Frysinger1-0/+3
2012-03-21sim: cris: update testsuite output after strsignal changeMike Frysinger38-37/+50
2012-03-21sim/testsuite/: split up arch-specific changelogsMike Frysinger7-613/+587
2012-03-19sim: bfin: add exhaustive parallel-insn testsMike Frysinger4-0/+33517
2012-03-19sim: bfin: unify se_all*opcodes testsMike Frysinger4-287/+255
The current se_all*opcodes tests are very similar in how they work. In preparation for adding more tests along these lines, unify the common bits into a framework that others can include and build off of easily. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-19sim: bfin: add tests for new shift behaviorMike Frysinger2-0/+11
2012-03-19sim: bfin: add tests for new shift behaviorMike Frysinger4-0/+137
2012-03-19sim: tests: ignore generated testsMike Frysinger2-0/+5
2012-03-19sim: bfin: import optimizations from 32bit test into 16bit testMike Frysinger2-35/+73
The 32bit allopcodes test had quite a bit of optimization added to it so that it ran in a reasonable amount of time out of uncached memory. Port those changes over to the 16bit test so the two share common code. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-01-04Copyright year update in most files of the GDB Project.Joel Brobecker14-27/+14
gdb/ChangeLog: Copyright year update in most files of the GDB Project.
2011-10-18sim: testsuite: regenerate configureMike Frysinger2-0/+5
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-09-29sim: bfin: use store buffer for VIT_MAX insnsMike Frysinger2-0/+57
The VIT_MAX insns can be used in parallel, so we need to use the store buffer so we don't clobber the output register before we get a chance to do a memory store with it. Reported-by: Kai Iskratsch <kai@stella.at> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-01 PR sim/12737Nick Clifton5-4/+8
* sim/arm/iwmmxt/wcmpgt.cgs: Remove expectation of failure. * sim/arm/iwmmxt/wmac.cgs: Remove expectation of failure. * sim/arm/iwmmxt/wsra.cgs: Remove expectation of failure. * sim/arm/xscale/blx.cgs: Remove expectation of failure.
2011-06-18sim: bfin: add tests for recent dsp fixesMike Frysinger14-0/+2502
Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-05sim: bfin: add missing gitignore fileMike Frysinger1-0/+1
2011-06-04sim: bfin: import testsuiteMike Frysinger813-0/+221145
Now that the common sim testsuite code supports .S and .c files, we can import the Blackfin testsuite. There are about ~800 tests here, so I'm only attaching a compressed patch of them. Other than adding files to sim/testsuite/sim/bfin/, the sim/configure.tgt file was updated to mark Blackfin as having a testsuite, and sim/configure regenerated. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-16sim: tests: support .S/.c filesMike Frysinger2-9/+47
Rather than requiring all sim tests to be preprocessed .s files, add support for .S and .c files so we can easily write code using a higher level language like C. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-11 PR sim/12737Hans-Peter Nilsson5-0/+11
* sim/arm/iwmmxt/wcmpgt.cgs, sim/arm/iwmmxt/wmac.cgs, sim/arm/iwmmxt/wsra.cgs, sim/arm/xscale/blx.cgs: Kfail.
2011-05-04gdb:Joseph Myers7-7/+21
* configure.host (xscale*): Don't handle target. * configure.tgt (thumb*-*-* | strongarm*-*-* | xscale-*-*): Don't handle targets. gdb/gdbserver: * README: Don't mention xscale*-*-linux*. * configure.srv (xscale*-*-linux*): Don't handle target. gdb/testsuite: * gdb.base/a2-run.exp (strongarm-*-coff): Don't handle target. * gdb.base/float.exp (xscale*-*-*, strongarm*-*-*): Don't handle targets. * gdb.base/long_long.exp (xscale*-*-*, strongarm*-*-*): Don't handle targets. sim: * configure.tgt (thumb*-*-* | strongarm*-*-* | xscale-*-*): Don't handle targets. * configure: Regenerate. sim/testsuite: * configure: Regenerate. * sim/arm/allinsn.exp (xscale*-*-*): Don't handle target. * sim/arm/misc.exp (thumb*-*-*, xscale*-*-*): Don't handle targets. * sim/arm/iwmmxt/iwmmxt.exp: Test for arm*-*-* instead of xscale*-*-*. * sim/arm/thumb/allthumb.exp (thumb*-*-*): Don't handle target. * sim/arm/xscale/xscale.exp: Test for arm*-*-* instead of xscale*-*-*.
2011-01-05 * testutils.inc: Correct comment syntax fallout fromHans-Peter Nilsson5-8/+12
copyright update. * utils-dsp.inc, utils-fpu.inc, utils-mdmx.inc: Ditto.
2011-01-05 * mips32-dsp.s: Update copyright year.Hans-Peter Nilsson2-1/+5
2011-01-01run copyright.sh for 2011.Joel Brobecker13-13/+23
generated by cgit v1.1 at 2024-09-16 03:42:36 +0000