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AgeCommit message (Expand)AuthorFilesLines
2020-11-12sim: pru: Add support for LMBD instructionDimitar Dimitrov2-0/+65
2020-10-06sim: Fix autoreconf errors in sim/ directoryAndrew Burgess15-15/+40
2020-09-08bpf: simulator: correct div, mod insn semanticsDavid Faust3-17/+45
2020-08-05MSP430: sim: Fix incorrect simulation of unsigned widening multiplyJozef Lawrynowicz2-0/+59
2020-08-04sim: eBPF simulatorJose E. Marchesi14-0/+862
2020-07-29Run `autoreconf -vf` throughoutSimon Marchi2-3/+7
2020-01-22MSP430: Fix simulator execution of RRUX instructionJozef Lawrynowicz2-0/+18
2020-01-01Update copyright year range in all GDB files.Joel Brobecker60-60/+60
2019-12-19Add install-strip to sim/Tom Tromey2-0/+6
2019-09-23Add testsuite for the PRU simulator portDimitar Dimitrov14-0/+582
2019-06-13sim/testsuite/or1k: Add tests for unordered comparesStafford Horne3-0/+202
2019-06-13sim/testsuite/or1k: Add test case for l.adrp instructionStafford Horne2-0/+77
2019-06-13sim/testsuite/or1k: Add test for 64-bit fpu operationsStafford Horne2-0/+176
2019-01-01Update copyright year range in all GDB files.Joel Brobecker45-45/+45
2018-10-05or1k: Add the l.muld, l.muldu, l.macu, l.msbu insnsRichard Henderson3-65/+61
2018-06-19Bump to autoconf 2.69 and automake 1.15.1Simon Marchi10-1011/+1301
2018-06-18config: Sync with GCCSimon Marchi1-1/+0
2018-01-02Update copyright year range in all GDB filesJoel Brobecker45-45/+45
2017-12-12sim: testsuite: add testsuite for or1k simPeter Gavin28-0/+6510
2017-04-22Fix ldn/stn multiple instructions. Fix testcases with unaligned data.Jim Wilson12-14/+341
2017-04-08Add support for fcvtl and fcvtl2.Jim Wilson2-0/+61
2017-04-08Support the fcmXX zero instructions.Jim Wilson2-0/+81
2017-03-25Fix bug with cmn/adds where C flag was incorrectly set.Jim Wilson2-0/+21
2017-03-03Fix umulh and smulh bugs. Fix bugs in last week's sumov.s testsuite.Jim Wilson3-5/+68
2017-02-25Add missing smov support, and clean up existing umov support.Jim Wilson2-0/+93
2017-02-25Add missing cnt (popcount) instruction support.Jim Wilson2-0/+37
2017-02-19Fix for aarch64 sim sxtl/uxtl insns, plus another fix for addv.Jim Wilson6-19/+126
2017-02-14Add self to aarch64 maintainers. Fix mla instruction.Jim Wilson2-0/+105
2017-02-14Fix bit/bif instructions.Jim Wilson2-0/+93
2017-02-14Add ldn/stn single support, fix ldnr support.Jim Wilson4-0/+404
2017-01-23Add support for cmtst.Jim Wilson2-0/+108
2017-01-17Fixes for addv and xtn2 instructions.Jim Wilson3-0/+134
2017-01-09Fix problems with the implementation of the uzp1 and uzp2 instructions.Jim Wilson2-0/+218
2017-01-04Five fixes, for fcsel, fcvtz, fminnm, mls, and non-widening mul.Jim Wilson6-0/+547
2017-01-01update copyright year range in GDB filesJoel Brobecker20-20/+20
2016-12-21Fix bugs with float compare and Inf operands.Jim Wilson2-0/+150
2016-12-13Fix aarch64 sim bug with adds64, and add testcases for last 3 bug fixes.Jim Wilson5-9/+288
2016-01-10sim: drop --enable-sim-cflags optionMike Frysinger2-5/+4
2016-01-06Change copyright owner to FSF in sim/testsuite/sim/mips/hilo-hazard-4.sJoel Brobecker2-2/+5
2016-01-05Fix the execution of the MSP430 simulator testsuite.Nick Clifton2-2/+38
2016-01-04sim: parse_args: polish getopt error messageMike Frysinger3-2/+7
2016-01-03sim: convert to bfd_endianMike Frysinger2-1/+6
2016-01-01GDB copyright headers update after running GDB's copyright.py script.Joel Brobecker19-19/+19
2015-12-25sim: cris: migrate from WITH_DEVICES to WITH_HWMike Frysinger2-1/+5
2015-12-25sim: cris: set up sane default path to rvdummyMike Frysinger2-1/+14
2015-12-24sim: make LMA loading the default for all targetsMike Frysinger3-1/+25
2015-11-24Add an AArch64 simulator to GDB.Nick Clifton6-0/+105
2015-11-15sim: mcore: add a fail testcaseMike Frysinger3-1/+14
2015-11-15sim: m32c: add a basic testsuiteMike Frysinger5-0/+92
2015-11-15sim: testsuite: support basic vars in flagsMike Frysinger2-1/+12
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