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AgeCommit message (Collapse)AuthorFilesLines
1998-02-02New test - verify sdl insn.Andrew Cagney2-0/+43
1997-12-12Renamed v850eq -> v850eaNick Clifton1-3/+3
1997-12-12Parent directory renamed.Nick Clifton27-1884/+0
1997-12-11sanitization fixes. (files not mentioned, fences misspelled)Felix Lee1-0/+8
1997-12-09Test/fix d10v RTE instruction.Andrew Cagney2-0/+19
1997-12-08Fix typo, REP_S was refering to REP_E register.Andrew Cagney1-0/+4
Add test.
1997-12-08For "trap", IBT and RIE exceptions, mask all PSW.SM. NB: SteppingAndrew Cagney1-0/+7
through an exception may not work correctly. For GDB reads/writes to the control registers, ensure the cpu state is updated correctly.
1997-12-04Add DM (bit 4) to PSW. See 7-1 for more info.Andrew Cagney4-0/+62
Test.
1997-12-03* d10v_sim.h (SEXT56): Define.Andrew Cagney6-1/+182
* simops.c (OP_4201): For "rac", sign extend 56 bit value before it is shifted. * d10v_sim.h (MAX32, MIN32, MASK32, MASK40): Re-define using SIGNED64 macro.
1997-12-02For "sub", compute carry by comparing inputs.Andrew Cagney2-0/+43
Test.
1997-12-02For "msbu", subtract unsigned product from ACC,Andrew Cagney4-1/+31
Test.
1997-12-02For "mulxu", store unsigned product in ACC.Andrew Cagney4-4/+36
Test.
1997-12-02Test mv[tf]ac instructions.Andrew Cagney1-0/+19
1997-12-02For MACU add unsigned multiply to accumulator.Andrew Cagney3-1/+83
Test.
1997-12-02For sub2w, compute carry according to negated addition rules.Andrew Cagney3-1/+75
Test.
1997-11-25Add file alu-n-tst.hAndrew Cagney1-0/+1
1997-11-24SanitizationAndrew Cagney1-0/+5
1997-11-17Test SUBI omsnAndrew Cagney1-0/+17
1997-11-10Test rachi instruction.Andrew Cagney3-3/+44
1997-10-17Preliminary tests for sim-alu module.Andrew Cagney3-0/+189
1997-10-15Sanitize additional files.Andrew Cagney1-0/+3
1997-10-15Enable d10v simulator testsuite - two tests: Hello World and exit47.Andrew Cagney4-0/+1072
1997-10-03Rewrite simulator floating point module. Do not rely on host FPAndrew Cagney1-0/+538
implementation. Add preliminary support for different IEEE-754 rounding modes. Implement SQRT in software. Update TiC80 simulator. Add sim-fpu -> TestFloat interface for testing.
1997-10-02Fix typo, WITH_TARGET_WORD_BITSIZE not WITH_TARGET_BITSIZE.Andrew Cagney1-4/+4
1997-09-29Do not sanitize out sim/testsuite/common directory.Andrew Cagney2-1/+42
1997-09-24r5900 sanitization fixes.Jeff Law1-1/+1
1997-09-23mips64vr5900el-elf -> mips64r5900-elf.Jeff Law66-2062/+0
1997-09-23Check v850eq popm[hl] instructions.Andrew Cagney5-2/+284
Check v850 NMI/RETI.
1997-09-19More tests.Andrew Cagney9-16/+255
Have sld check verify that the processor is a v850eq.
1997-09-18add missing files.Felix Lee4-1/+44
1997-09-18v850 files that weren't being removed if !keep-v850Felix Lee1-1/+6
1997-09-17Test US bit of v850eq.Andrew Cagney3-0/+65
Loop program for testing interrupt delivery.
1997-09-17More v850 simulator tests.Andrew Cagney8-8/+62
1997-09-17More v850 simulator tests.Andrew Cagney12-23/+1114
1997-09-16Generic rules for building simple simulator test programs.Andrew Cagney1-0/+48
1997-09-16More sim-bits testing.Andrew Cagney2-4/+37
1997-09-16v850eq simulator tests.Andrew Cagney6-0/+132
1997-09-15Update to reflect change to sim/common/aclocal.m4 (allow sim/commonAndrew Cagney1-0/+5
directory to specify its own unqiue config.h file).
1997-09-09Add basic tests for d10v-elf simulator.Andrew Cagney2-0/+14
1997-09-08Check MS* macros from sim/common.Andrew Cagney2-0/+574
1997-09-08Sanity check for tic80 simulator.Andrew Cagney4-0/+1103
1997-09-03Basic tests for tic80 simulator.Andrew Cagney3-0/+580
1997-09-03Doc directory - README.Andrew Cagney3-12/+17
Make suffix of executables to be run on simulator .run
1997-09-01Test/fix pabsh, pabsw, psrlvw.Andrew Cagney9-29/+79
1997-07-29Add test for "mtsa"Andrew Cagney3-0/+16
1997-07-28More checks for pdivuwAndrew Cagney2-0/+18
1997-07-15Configure r5900 testsuite sub-directory.Andrew Cagney2-1/+38
1997-07-15Similistic configure/build scripts for tx59 simulator tests.Andrew Cagney5-0/+1182
1997-07-15Generic tests for 5900.Andrew Cagney2-0/+40
1997-07-14Standard simulator tests.Andrew Cagney4-0/+65