| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 1998-02-13 | Test switching between SPI/SPU. | Andrew Cagney | 1 | -0/+5 |
| 1998-02-11 | Update tests to match recently modified ABI | Andrew Cagney | 1 | -0/+11 |
| 1997-12-08 | Fix typo, REP_S was refering to REP_E register. | Andrew Cagney | 1 | -0/+4 |
| 1997-12-08 | For "trap", IBT and RIE exceptions, mask all PSW.SM. NB: Stepping | Andrew Cagney | 1 | -0/+7 |
| 1997-12-04 | Add DM (bit 4) to PSW. See 7-1 for more info. | Andrew Cagney | 1 | -0/+7 |
| 1997-12-03 | * d10v_sim.h (SEXT56): Define. | Andrew Cagney | 1 | -1/+10 |
| 1997-12-02 | For "msbu", subtract unsigned product from ACC, | Andrew Cagney | 1 | -1/+1 |
| 1997-12-02 | For "mulxu", store unsigned product in ACC. | Andrew Cagney | 1 | -1/+2 |
| 1997-12-02 | For sub2w, compute carry according to negated addition rules. | Andrew Cagney | 1 | -0/+14 |
| 1997-11-10 | Test rachi instruction. | Andrew Cagney | 1 | -0/+8 |
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