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2014-01-07remove PARAMS from simTom Tromey1-16/+16
This removes the last uses of PARAMS from sim. 2014-01-06 Tom Tromey <tromey@redhat.com> * README-HACKING: Don't use PARAMS. * arm/wrapper.c: Don't use PARAMS. * bfin/sim-main.h: Don't use PARAMS. * common/callback.c: Don't use PARAMS. * common/cgen-trace.c: Don't use PARAMS. * common/run-sim.h: Don't use PARAMS. * common/run.c: Don't use PARAMS. * common/sim-base.h: Don't use PARAMS. * common/sim-load.c: Don't use PARAMS. * common/sim-options.h: Don't use PARAMS. * common/sim-trace.c: Don't use PARAMS. * common/sim-trace.h: Don't use PARAMS. * common/sim-utils.h: Don't use PARAMS. * cr16/cr16_sim.h: Don't use PARAMS. * cr16/gencode.c: Don't use PARAMS. * cr16/interp.c: Don't use PARAMS. * cr16/simops.c: Don't use PARAMS. * d10v/d10v_sim.h: Don't use PARAMS. * d10v/gencode.c: Don't use PARAMS. * d10v/interp.c: Don't use PARAMS. * d10v/simops.c: Don't use PARAMS. * erc32/erc32.c: Don't use PARAMS. * erc32/exec.c: Don't use PARAMS. * erc32/float.c: Don't use PARAMS. * erc32/func.c: Don't use PARAMS. * erc32/sis.c: Don't use PARAMS. * erc32/sis.h: Don't use PARAMS. * mips/interp.c: Don't use PARAMS. * mips/sim-main.h: Don't use PARAMS. * sh/interp.c: Don't use PARAMS. * v850/sim-main.h: Don't use PARAMS. * v850/v850_sim.h: Don't use PARAMS.
2013-03-15gdb:Steve Ellcey1-1/+1
2013-03-15 Steve Ellcey <sellcey@mips.com> * remote-sim.c (sim_command_completer): Make char arguments const. include: 2013-03-15 Steve Ellcey <sellcey@mips.com> * gdb/remote-sim.h (sim_command_completer): Make char arguments const. sim: 2013-03-15 Steve Ellcey <sellcey@mips.com> * arm/wrapper.c (sim_complete_command): Make char arguments const. * avr/interp.c (sim_complete_command): Ditto. * common/sim-options.c (sim_complete_command): Ditto. * cr16/interp.c (sim_complete_command): Ditto. * erc32/interf.c (sim_complete_command): Ditto. * m32c/gdb-if.c (sim_complete_command): Ditto. * microblaze/interp.c (sim_complete_command): Ditto. * ppc/sim_calls.c (sim_complete_command): Ditto. * rl78/gdb-if.c (sim_complete_command): Ditto. * rx/gdb-if.c (sim_complete_command): Ditto. * sh/interp.c (sim_complete_command): Ditto.
2012-02-16Update sim_fetch_register, sim_store_register for sh and mn10300.Kevin Buettner1-3/+3
Fix compile warnings for sh built on 64-bit hosts.
2011-04-16sim: add sim_complete_command stubs for non-common-using portsMike Frysinger1-0/+6
For the ports that don't use the common/ subdir, we need to add stub funcs to them to avoid build failures with gdb and command completion. These do not implement the actual completion functionality ... any port that wants that can either convert to the common/ subdir, or fill out the function on their own time. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-04-14sim: constify sim_write source buffer (part 2)Mike Frysinger1-2/+2
As pointed out by Sandra Loosemore, a bunch of targets define sim_write themselves instead of using the common/ code. So constify them too. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-02-14 * interp.c: Don't include sysdep.h.Masaki Muranaka1-1/+18
Include stdio.h and errno.h. Include string.h strings.h stdlib.h sys/stat.h if present.
2008-02-042008-02-04 Antony King <antony.king@st.com>Andrew Stubbs1-13/+8
* interp.c (macl): Fix non-portable implementation.
2005-11-102005-11-10 Andrew Stubbs <andrew.stubbs@st.com>Andrew Stubbs1-1/+1
* interp.c (sim_memory_size): Use same amount of memory on Windows as elsewhere.
2005-09-19 * interp.c (<sys/mman.h>): Include.Joern Rennecke1-5/+35
(mcalloc): New function / macro. (mfree): New macro. (sim_size): Use mcalloc and mfree.
2005-08-02 * interp.c (strswaplen): Add one for '\0' delimiter.Joern Rennecke1-1/+5
2004-09-08 * gencode.c (movua.l): Compensate for endianness.Corinna Vinschen1-27/+321
* interp.c (RAISE_EXCEPTION_IF_IN_DELAY_SLOT): New macro. (in_delay_slot): New flag variable. (Delay_Slot): Set in_delay_slot. (sim_resume): Reset in_delay_slot after leaving code switch. * gencode.c (op tab): Call RAISE_EXCEPTION_IF_IN_DELAY_SLOT for all instructions not allowed in delay slots. Commited by Corinna Vinschen <vinschen@redhat.com> Introduce SH2a support. * interp.c: Change type of jump table to short. Add various macros. (sim_load): Save the bfd machine code. (sim_create_inferior): Ditto. (union saved_state_type): Add tbr, ibnr and ibcr registers. Move bfd_mach to end of struct. Add regstack pointer. (init_dsp): Don't swap contents of sh_dsp_table any more. Instead use it directly in its own switch statement. Allocate space for 512 register banks. (do_long_move_insn): New function. (do_blog_insn): Ditto. (trap): Use trap #13 and trap #14 to set ibnr and ibcr. * gencode.c: Move movx/movy insns into separate switch statement. (op tab): Add sh2a insns. Reject instructions that are disabled on that chip. (gensim_caselist): Generate default case here instead of in caller. (gensim): Generate two separate switch statements. Call gensim_caselist once for each (for movsxy_tab and for tab). Add tokens for r15 and multiple regs. (conflict_warn, warn_conflicts): Add for debugging.
2004-02-122004-02-12 Michael Snyder <msnyder@redhat.com>Michael Snyder1-3/+3
* gencode.c (table): Change from char to short. (dumptable): Change generated table from char to short. * interp.c (sh_jump_table, sh_dsp_table, ppi_table): char to short. (init_dsp): Compute size of sh_dsp_table. (sim_resume): Change jump_table from char to short.
2004-01-102004-01-07 Michael Snyder <msnyder@redhat.com>Michael Snyder1-55/+60
* gencode.c: Whitespace cleanup. * interp.c: Ditto.
2004-01-092004-01-07 Michael Snyder <msnyder@redhat.com>Michael Snyder1-6/+43
* gencode.c: Replace 'Hitachi' with 'Renesas'. (op tab): Add new instructions for sh4a, DBR, SBR. (expand_opcode): Add handling for new movxy combinations. (gensym_caselist): Ditto. (expand_ppi_movxy): Remove movx/movy expansions, now handled in expand_opcode. (gensym): Add some helpful macros. (expand_ppi_code): Flatten loop for simplicity, tweak for 12-bit instead of 8-bit table (some insns are ambiguous to 8 bits). (ppi_gensim, main): Generate 12-bit instead of 8-bit ppi table. * interp.c: Replace 'Hitachi' with 'Renesas'. (union saved_state_type): Add dbr, sgr, ldst. (get_loop_bounds_ext): New function. (init_dsp): Add bfd_mach_sh4al_dsp. (sim_resume): Handle extended loop bounds.
2003-11-03 * interp.c (fsca_s, fsrra_s): New functions.Joern Rennecke1-0/+49
* gencode.c (tab): Add entries for fsca and fsrra. (expand_opcode): Allow variable length n / m fields.
2003-10-15include/gdb:Joern Rennecke1-0/+11
* callback.h (struct host_callback_struct): New members ftruncate and truncate. gdb: sim/common: * callback.c (os_ftruncate, os_truncate): New functions. (default_callback): Initialize ftruncate and truncate members. sim/sh: * syscall.h (SYS_truncate, SYS_ftruncate): Define. * interp.c (trap): Add support for SYS_ftruncate and SYS_truncate.
2003-08-112003-08-11 Shrinivas Atre <shrinivasa@KPITCummins.com>Michael Snyder1-0/+52
* sim/sh/gencode.c ( tab[] ): Addition of MAC.L handler and correction for MAC.W handler * sim/sh/interp.c ( macl ): New Function. Implementation of MAC.L handler.
2003-02-27Index: arm/ChangeLogAndrew Cagney1-3/+3
2003-02-27 Andrew Cagney <cagney@redhat.com> * wrapper.c (sim_create_inferior, sim_open): Rename _bfd to bfd. Index: common/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * sim-utils.h (sim_analyze_program, sim_load_file): Rename _bfd to bfd. * sim-hload.c (sim_load), sim-base.h (sim_state_base): Ditto. * nrun.c (main): Ditto. Index: d10v/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd. Index: erc32/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * interf.c (sim_open, sim_create_inferior): Rename _bfd to bfd. Index: h8300/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * compile.c (sim_open, sim_create_inferior): Rename _bfd to bfd. Index: h8500/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * compile.c (sim_open, sim_create_inferior): Rename _bfd to bfd. Index: i960/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * sim-if.c (sim_open, sim_create_inferior): Rename _bfd to bfd. Index: m32r/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * sim-if.c (sim_open, sim_create_inferior): Rename _bfd to bfd. Index: m68hc11/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * interp.c (sim_prepare_for_program, sim_open) (sim_create_inferior): Rename _bfd to bfd. Index: mcore/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd. Index: mips/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * interp.c (sim_open): (sim_create_inferior): Index: mn10200/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd. Index: mn10300/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * interp.c (sim_open, sim_create_inferior, sim_open) (sim_create_inferior): Rename _bfd to bfd. Index: ppc/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * sim_calls.c (sim_open, sim_create_inferior): Rename _bfd to bfd. Index: sh/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * interp.c (init_dsp, sim_open, sim_create_inferior): Rename _bfd to bfd. Index: v850/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd. Index: z8k/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * iface.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
2002-10-11gcc uses trap 33 for profiling, but the simulator didn't support it.Joern Rennecke1-4/+15
This patch fixes the gcc.dg/nest.c failures for sh-elf. Fri Oct 11 16:22:28 2002 J"orn Rennecke <joern.rennecke@superh.com> * interp.c (trap): Return int. Take extra parameter for address of the trap instruction. Changed all callers. Add case 33 for profiling. * gencode.c (trapa): Handle trap 33 using the trap function. Add read of vector for generic traps.
2002-07-17include/gdb:Joern Rennecke1-114/+163
* sim-sh.h: Add enum constants for sh[1-4], sh3e, sh3?-dsp, renumbering the sh-dsp registers to use distinct numbers. sim/sh: * Makefile.in (interp.o): Depend on $(srcroot)/include/gdb/sim-sh.h. * interp.c: Include "gdb/sim-sh.h". (sim_store_register, sim_fetch_register): Use constants defined there. gdb: * sh-tdep.c (sh_dsp_register_sim_regno): New function. (sh_gdbarch_init): Use it for sh-dsp.
2002-06-18 * interp.c (sim_resume): Fix setting of bus error forJoern Rennecke1-1/+1
instruction fetch.
2002-06-09Move include/callback.h and include/remote-sim.h to include/gdb/.Andrew Cagney1-2/+2
Update accordingly.
2001-01-30* interp.c (sim_create_inferior): Record program arguments forAlexandre Oliva1-3/+45
later inspection by the trap handler. (count_argc): New function. (prog_argv): Declare static. (sim_write): Declare. (trap): Implement argc, argnlen and argn system calls. Do not abort on unknown system calls--simply return -1. * syscall.h (SYS_argc, SYS_argnlen, SYS_argn): Define.
2001-01-24* interp.c (trap): Implement time.Alexandre Oliva1-0/+3
2000-05-15sh-dsp support, simulator speedup by using host byte order:Joern Rennecke1-304/+891
sim: * Makefile.in (interp.o): Depends on ppi.c . (ppi.c): New rule. * gencode.c (printonmatch, think, genopc): Deleted. (MAX_NR_STUFF): Now 42. (tab): Add SH-DSP CPU instructions. Amalgamate ldc / stc / lds / sts instructions with similar bit patterns. Fix opcodes of stc Rm_BANK,@-<REG_N>. Fix semantics of lds.l @<REG_N>+,MACH (no sign extend). (movsxy_tab): New array. For movs, change MMMM field to GGGG, and mmmm field to MMMM. Added entries for movx, movy and parallel processing insns. (ppi_tab): New array. (qfunc): Stabilize sort. (expand_opcode): Handle [01][01]NN, [01][01]xx and [01][01]yy. Handle 'M', 'G' 's' 'X', 'a', 'Y' and 'A'. (dumptable): Now takes three arguments. Changed all callers. Emit just one contigous jump table. (filltable): Now takes an argument. Changed all callers. Make index static. (ppi_moves, expand_ppi_code, ppi_filltable, ppi_gensim): New functions. (gensim_caselist): New function, broken out of gensim. Handle opcode fields 'x', 'y', 's', 'M', 'G', 'X', 'a', and 'Y'. Handle ref '9'. (gensim): Handle 'N' in code field and '8' in refs field. Call gensim_caselist - twice. (ppi_index): New static variable. (main): Unsupport default action. Add dsp support for -x / -s option. Add -p option. * interp.c (sh_jump_table, sh_dsp_table, ppi_table): Declare. (saved_state_type): Rearrange to allow amalgamated ldc / stc / lds / sts to work efficiently. (target_dsp): New static variable. (GBR, VBR, SSR, SPC, MACH, MACL): Reflect saved_state_type change. (FPUL, Rn_BANK, SET_Rn_BANK, M, Q, S, T, SR_BL, SR_RB): Likewise. (SR_MD, SR_RC, SET_SR_BIT, GET_SR, SET_RC, GET_FPSCR): Likewise. (RS, RE, MOD, MOD_ME, DSP_R): Likewise. (set_fpscr1): Likewise. Use target_dsp to check for dsp. (MOD_MSi, SIG_BUS_FETCH): Deleted. (CREG, SREG, PR, SR_MASK_DMY, SR_MASK_DMX, SR_DMY): New macros. (SR_DMX, DSR, MOD_DELTA, GET_DSP_GRD): Likewise. (SET_MOD): Reflect saved_state_type change. Set MOD_DELTA instead of MOD_MS, and encode SR_DMY / SR_DMX into high word of MOD_ME. (set_sr): Reflect saved_state_type change. Fix SR_RB handling. Use SET_MOD. (MA, L, TL, TB): Now controlled by ACE_FAST. (SEXT32): Just cast to int. (SIGN32): Fixed to only shift by 31. (CHECK_INSN_PTR): SIGBUS at insn fetch now represented by insn_end 0. (ppi_insn): Declare. (ppi.c): Include. (init_dsp): Set target_dsp. When it changes, switch end of sh_jump_table with sh_dsp_table. (sim_resume) Don't declare sh_jump_table0. Use sh_jump_table instead. Don't Declare PR if it's #defined. Fix single-stepping (Was broken in Mar 6 16:59:10 patch). (sim_store_register, sim_read_register): Translate accesses to reflect saved_state_type change. * interp.c (set_sr): Set sr. (SET_RC, MOD, MOD_MS, MOD_ME, SET_MOD, MOD_MS, MOD_ME): New macros. (set_fpscr1): Don't bank-switch fpu registers when simulating sh-dsp. (DSP_R): Fix definition. (sim_resume): Remove outdated SET_SR use. * interp.c (saved_state): New members for struct member asregs: rs, re, insn_end, xram_start, yram_start. (struct loop_bounds): New struct. (SKIP_INSN): New macro. (get_loop_bounds): New function. (endianw): Renamed to global_endianw. (maskw): negated bits. (PC): Now insn_ptr. (SR_MASK_RC, SR_RC_INCREMENT, SR_RC, RAISE_EXCEPTION): New macros. (RS, RE, DSP_R, DSP_GRD, A1, A0, X0, X1, Y0, Y1, M0, A1G): Likewise. (M1, A0G, RIAT, PT2H, PH2T, SET_NIP, CHECK_INSN_PTR): Likewise. (SIG_BUS_FETCH): Likewise (raise_exception, riat_fast): New functions. (raise_buserror, sim_stop): Use raise_exception. (PROCESS_SPECIAL_ADDRESS): Use xram_start / yram_start. (BUSERROR, WRITE_BUSERROR, READ_BUSERROR): Reverse sense of mask argument. (FP_OP, set_dr): Use RAISE_EXCEPTION. (wlat_fast, wwat_fast, wbat_fast, rlat_fast, rwat_fast, rbat_fast): Declare. Remove redundant masking. (wwat_fast, rwat_fast): Add argument endianw. Changed callers. (MA): Updated for change pc -> PC. (Delay_Slot): Use RIAT. (empty): Deleted. (trap): Remove argument little_endian. Add argument endianw. Changed all callers. Use raise_exception. (macw): Add argument endainw. Changed all callers. (init_dsp): New function, extended after broken out of init_pointers. (sim_resume): Replace pc with insn_ptr. Replace little_endian with endianw. Replace nia with nip. Reverse sense of maskb / maskw / maskl. Implement logic for zero-overhead loops. Don't try to interpret garbage when getting a SIGBUS at insn fetch. (sim_open): Call init_dsp. * gencode.c (tab): Use SET_NIP instead of nia = . Use PH2T / PT2H / RAISE_EXCEPTION where appropriate. Add extra cycles for brai, braf , bsr, bsrf, jmp, jsr. * interp.c (sim_store_register, sim_fetch_register): Do proper endianness switch. * interp.c (saved_state_type): New members for struct member asregs: xymem_select, xmem, ymem, xmem_offset, ymem_offset. (special_address): Delete. (BUSERROR): Now a two-argument predicate. (PROCESS_SPECIAL_ADDRESS, WRITE_BUSERROR, READ_BUSERROR): New macros. (wlat_little, wwat_little, wbat_any, wlat_big, wwat_big): Delete. (process_wlat_addr, process_wwat_addr): New functions. (process_wbat_addr, process_rlat_addr, process_rwat_addr): Likewise. (process_rbat_addr): Likewise. (wlat_fast, wwat_fast, wbat_fast): Use WRITE_BUSERROR. (rlat_little, rwat_little, rbat_any, rlat_big, rwat_big): Delete. (rlat_fast, rwat_fast, rbat_fast): Use READ_BUSERROR. (RWAT, RLAT, RBAT, WWAT, WLAT, WBAT): Delete SLOW versions. (do_rdat, trap): Delete SLOW code. (SEXT32, SIGN32): New macros. (swap, swap16): Now integer in - integer out. Changed all callers. (strswaplen, strnswap): Delete SLOW versions. (init_pointers): Initialize dsp memory selection (preliminary). (sim_store_register, sim_fetch_register): Use swap instead of big / little endian read / write functions. * interp.c (maskl): Deleted. (endianw, endianb): New variables. (special_address): Now inline. (bp_holder): Put raising of buserror there, rename to: (raise_buserror). (BUSERROR): Now yields a value. Changed all users. (wbat_big): Delete. (wlat_fast, wwat_fast, wbat_fast): New functions. (rlat_fast, rwat_fast, rbat_fast): Likewise. (RWAT, RLAT, RBAT, WWAT, WLAT, WBAT): Use new functions. (do_rdat, do_wdat): Likewise. Take maskl argument instead of little_endian one. Changed caller macros. (swap, swap16): Use w[rw]lat_big / w[rw]lat_little directly. (strswaplen, strnswap): New functions. (trap): Use them to fix up endian mismatches; disable SYS_execve and SYS_execv; fix double address translation for SYS_pipe and SYS_stat. (sym_write, sym_read): Add endianness translation. (sym_store_register, sym_fetch_register): Add maskl local variable. (sim_open): Set endianw and endianb. gdb: * sh-tdep.c (sh_dsp_reg_names, sh3_dsp_reg_names): New arrays. (sh_processor_type_table): Add entries for bfd_mach_sh_dsp and bfd_mach_sh3_dsp. (sh_show_regs): Floating point registers are called fr0-fr15. For sh4, display fpul, fpscr and fr0-fr15 / dr0-dr14 as appropriate. Handle sh-dsp and sh3-dsp. config/sh/tm-sh.h (REGISTER_VIRTUAL_TYPE): sh-dsp / sh3-dsp don't have floating point registers. (DSR_REGNUM, A0G_REGNUM, A0_REGNUM, A1G_REGNUM, A1_REGNUM): Define. (M0_REGNUM, M1_REGNUM, X0_REGNUM, X1_REGNUM, Y0_REGNUM): Likewise. (Y1_REGNUM, MOD_REGNUM, RS_REGNUM, RE_REGNUM, R0B_REGNUM): Likewise.
1999-04-26import gdb-19990422 snapshotStan Shebs1-24/+213
1999-04-16Initial creation of sourceware repositorygdb-4_18-branchpointStan Shebs1-0/+1414
1999-04-16Initial creation of sourceware repositoryStan Shebs1-1663/+0
1997-09-02Comment typo fix.Joern Rennecke1-1/+1
1997-09-02Sanitation fixes.Joern Rennecke1-1/+41
1997-09-02Merge SH4 branch simulator in to devo.Andrew Cagney1-124/+448
1997-08-27Add ABFD argument to sim_create_inferior. Document.Andrew Cagney1-2/+6
Add file sim-hload.c - generic load for hardware only simulators. Review each simulators sim_open, sim_load, sim_create_inferior so that they more closely match required behavour.
1997-08-26Flush defunct sim_kill.Andrew Cagney1-7/+0
1997-08-25Add ABFD argument to sim_open call. Pass through to sim_config soAndrew Cagney1-4/+16
that image properties such as endianness can be checked. More strongly document the expected behavour of each of the sim_* interfaces. Add default endian argument to simulator config macro SIM_AC_OPTION_ENDIAN. Use in sim_config.
1997-04-19 * interp.c: Include float.h and define SIGTRAP if _WIN32.Stu Grossman1-2/+13
WIN32 -> _WIN32. * (trap): Do do SYS_chown for _WIN32.
1997-04-18 * interp.c (sim_resume): Fix argument to poll_quit.David Edelsohn1-1/+1
1997-04-18Ref gdb/11763 - can't stop a running simulator:Andrew Cagney1-22/+12
o Provide poll_quit callback to simulators so that they can poll for SIGINT on clueless OS's. o Add sim_stop to simulators so that clients can request a halt (eg gdbtk's STOP button) Works for PPC! o Re-arange remote-sim.c so that the hard work is moved from gdbsim_resume() to gdbsim_wait() (where it should be).
1997-04-17 * Makefile.in (SIM_OBJS): Add sim-load.o.David Edelsohn1-23/+51
* interp.c (target_byte_order): Delete. (sim_kind, myname, little_endian_p): New static locals. (init_pointers): Use little_endian_p instead of target_byte_order. (sim_resume): Likewise. (sim_open): Set sim_kind, myname. Set little_endian_p from -E arg. (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to load file into simulator. Set start address from bfd. (sim_create_inferior): Return SIM_RC. Delete arg start_address.
1997-03-13 * interp.c (sim_open): New SIM_DESC result. Argument is nowDavid Edelsohn1-122/+127
in argv form. (other sim_*): New SIM_DESC argument.
1995-10-06 * interp.c (trap, case SYS_utime): Cast second arg of utime toJim Wilson1-1/+3
void * to avoid compiler error.
1995-10-05 * interp.c (callback): Initialize to default callback.Steve Chamberlain1-22/+49
1995-09-20 * run.c (sim_callback_write_stdout): New.Steve Chamberlain1-1/+4
* interp.c (trap): Call sim_callback_write_stdout when needed.
1995-09-19Mon Sep 18 18:42:27 1995 steve chamberlain <sac@slash.cygnus.com>Steve Chamberlain1-36/+7
* interp.c (trap): Remove useless code. Fri Sep 15 19:30:05 1995 steve chamberlain <sac@slash.cygnus.com> * syscall.h: Copy from newlib.
1995-09-15 * gencode.c: Back up PC by 2 for breakpoints.Stu Grossman1-8/+9
* interp.c: Move fp regs beyond pc/pr/etc to avoid confusing GDB, which expect pc to immediatly follow regs[].
1995-08-31 * interp.c (FPSCR, FPUL): Define.Jeff Law1-6/+64
(struct save_state): Add fields for floating point registers, FPSCR and FPUL. (sim_resume): Add 'F' for accessing floating point registers in the save state structure. * gencode.c: Add sh3e opcodes. (gensym): Define a buffer for int<->fp conversions. First cut at simulating sh3e instructions. Basic stuff should work; instructions using fpul and fpscr are completely untested... Sanitized away for now (sh3e).
1995-06-29 * interp.c: (SYS_wait): Define as SYS_wait4 if available andFred Fish1-0/+8
SYS_wait is not already defined (SunOS 4.1.3 for example). (SYS_utime): Define as SYS_utimes if available and SYS_utime is not already defined.
1995-06-23 * interp.c: Don't include sys/times.h or sys/param.hSteve Chamberlain1-2/+0
1995-06-21 * interp.c: (SIGBUS, SIGTERM): Define if not.Steve Chamberlain1-12/+35
(sim_memory_size): default to 2^19 on PCs. (sim_resume): Poll for quits on win32.
1995-01-22Changes for PR 6203.Torbjorn Granlund1-39/+57
1994-12-29 * interp.c (BUSERROR): New macro.Steve Chamberlain1-197/+402
([r|w][bwl]at[little|big]) New functions. (sim_resume): If GO32 check for interrupt every now and again. Decrement PC if SIGBUS seen. * run.c (main): Return result of simulated _exit.
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