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2016-04-10Fix primary reason why the SH simulation hasn't been working on 64 bit hosts.Oleg Endo1-2/+2
2015-11-22sim: sh: delete global callback/argvMike Frysinger1-2/+2
2015-03-28sim: sh: clean up some warningsMike Frysinger1-2/+1
2015-03-28sim: sh: fix broken handling in DSR regMike Frysinger1-2/+2
2015-03-28sim: sh: clean up gencodeMike Frysinger1-67/+37
2014-11-28Correct fabs and fneg insns in simulatorOleg Endo1-3/+16
2007-10-082007-09-24 Andrew Stubbs <andrew.stubbs@st.com>Denis Pilat1-0/+3
2007-03-022007-03-02 Andrew Stubbs <andrew.stubbs@st.com>Daniel Jacobowitz1-3/+9
2005-06-17 * gencode.c (tab): Avoid lvalue casts. Suggested byDaniel Jacobowitz1-1/+3
2005-04-14* gencode.c (tab): Avoid inserting code before variables all declared.Jonathan Larmour1-4/+4
2004-09-08 * gencode.c (movua.l): Compensate for endianness.Corinna Vinschen1-10/+426
2004-08-18 * gencode.c (tab): For shad snd shld, fix result forJoern Rennecke1-2/+2
2004-02-132004-02-02 Michael Snyder <msnyder@redhat.com>Michael Snyder1-2/+2
2004-02-122004-02-12 Michael Snyder <msnyder@redhat.com>Michael Snyder1-2/+2
2004-01-272004-01-27 Michael Snyder <msnyder@redhat.com>Michael Snyder1-7/+7
2004-01-272004-01-27 Michael Snyder <msnyder@redhat.com>Michael Snyder1-19/+18
2004-01-102004-01-07 Michael Snyder <msnyder@redhat.com>Michael Snyder1-67/+71
2004-01-092004-01-07 Michael Snyder <msnyder@redhat.com>Michael Snyder1-131/+526
2004-01-062003-12-18 Michael Snyder <msnyder@redhat.com>Michael Snyder1-90/+81
2003-11-03 * interp.c (fsca_s, fsrra_s): New functions.Joern Rennecke1-6/+32
2003-08-112003-08-11 Shrinivas Atre <shrinivasa@KPITCummins.com>Michael Snyder1-3/+2
2003-08-072003-08-07 Michael Snyder <msnyder@redhat.com>Michael Snyder1-1/+1
2003-07-252003-07-25 Michael Snyder <msnyder@redhat.com>Michael Snyder1-6/+6
2003-07-252003-07-24 Michael Snyder <msnyder@redhat.com>Michael Snyder1-1/+1
2003-07-242003-07-23 Michael Snyder <msnyder@redhat.com>Michael Snyder1-17/+21
2003-07-232003-07-09 Michael Snyder <msnyder@redhat.com>Michael Snyder1-2/+2
2003-07-232003-07-09 Michael Snyder <msnyder@redhat.com>Michael Snyder1-3/+3
2003-07-232003-07-09 Michael Snyder <msnyder@redhat.com>Michael Snyder1-1/+1
2003-07-232003-06-27 Michael Snyder <msnyder@redhat.com>Michael Snyder1-25/+34
2003-07-232003-06-27 Michael Snyder <msnyder@redhat.com>Michael Snyder1-3/+4
2003-07-232003-06-27 Michael Snyder <msnyder@redhat.com>Michael Snyder1-1/+1
2003-07-232003-06-27 Michael Snyder <msnyder@redhat.com>Michael Snyder1-1/+1
2003-07-042003-07-03 Michael Snyder <msnyder@redhat.com>Michael Snyder1-3/+3
2003-06-282003-06-27 Michael Snyder <msnyder@redhat.com>Michael Snyder1-5/+5
2003-06-272003-06-27 Michael Snyder <msnyder@redhat.com>Michael Snyder1-2/+2
2003-02-06Commit Sh2E additionNick Clifton1-24/+24
2002-10-11gcc uses trap 33 for profiling, but the simulator didn't support it.Joern Rennecke1-23/+10
2000-10-24* pendanticismBen Elliston1-15/+13
2000-05-15sh-dsp support, simulator speedup by using host byte order:Joern Rennecke1-497/+1185
1999-08-31import gdb-1999-08-30 snapshotJason Molenda1-12/+28
1999-04-26import gdb-19990422 snapshotStan Shebs1-4/+164
1999-04-16Initial creation of sourceware repositorygdb-4_18-branchpointStan Shebs1-0/+1755
1999-04-16Initial creation of sourceware repositoryStan Shebs1-1962/+0
1997-09-02Merge SH4 branch simulator in to devo.Andrew Cagney1-238/+1371
1995-12-04* gencode.c (tab): Added several sh3 opcodes.J.T. Conklin1-4/+19
1995-11-29 * gencode.c (tab): In shad/shld definitions, negate R[m] beforeJim Wilson1-4/+4
1995-11-15 * gencode.c: jsr, bsr and bsrf actually save pc+4 in pr, and rtsStu Grossman1-2/+2
1995-11-14 * gencode.c: jsr actually saves pc+4, and rts actually uses pr+0.Stu Grossman1-4/+42
1995-08-31 * gencode.c (gensim): abort if an unknown opcode is encountered.Jeff Law1-7/+4
1995-05-24Wed May 24 14:07:11 1995 Steve Chamberlain <sac@slash.cygnus.com>Steve Chamberlain1-15/+11
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