riscv-gnu-toolchain/gdb.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Collapse)	Author	Files	Lines
2023-01-01	Update copyright year range in header of all files managed by GDB	Joel Brobecker	1	-1/+1
	This commit is the result of running the gdb/copyright.py script, which automated the update of the copyright year range for all source files managed by the GDB project to be updated to include year 2023.
2022-12-23	sim: riscv: move arch-specific settings to internal header	Mike Frysinger	1	-55/+0
	There's no need for these settings to be in sim-main.h which is shared with common/ sim code, so move it all out to a new header which only this port will include. We can also move the machs.h include out since the model logic was all generalized from compile-time to runtime last year.
2022-12-21	sim: enable common sim_cpu usage everywhere	Mike Frysinger	1	-2/+0
	All ports should be migrated now. Drop the SIM_HAVE_COMMON_SIM_CPU knob and require it be used everywhere now.
2022-12-21	sim: riscv: invert sim_cpu storage	Mike Frysinger	1	-3/+4

2022-01-01	Automatic Copyright Year update after running gdb/copyright.py	Joel Brobecker	1	-1/+1
	This commit brings all the changes made by running gdb/copyright.py as per GDB's Start of New Year Procedure. For the avoidance of doubt, all changes in this commits were performed by the script.
2021-05-17	sim: fully merge sim_state_base into sim_state	Mike Frysinger	1	-2/+0
	Now that all ports have migrated to the new framework, drop support for the old sim_state_base layout.
2021-05-17	sim: riscv: invert sim_state storage	Mike Frysinger	1	-5/+4

2021-02-04	sim: riscv: new port	Mike Frysinger	1	-0/+86
	This is a hand-written implementation that should have fairly complete coverage for the base integer instruction set ("i"), and for the atomic ("a") and integer multiplication+division ("m") extensions. It also covers 32-bit & 64-bit targets. The unittest coverage is a bit weak atm, but should get better.