aboutsummaryrefslogtreecommitdiff
path: root/sim/or1k
AgeCommit message (Expand)AuthorFilesLines
2021-08-17sim: rename ChangeLog files to ChangeLog-2021Mike Frysinger1-0/+0
2021-07-01sim: unify reserved instruction bits settingsMike Frysinger2-2/+4
2021-06-30sim: unify scache settingsMike Frysinger4-26/+6
2021-06-30sim: move default model to the runtime sim stateMike Frysinger5-23/+8
2021-06-30sim: namespace sim_machsMike Frysinger3-1/+11
2021-06-29sim: model: constify sim_machs storageMike Frysinger2-1/+5
2021-06-28sim: cgen: delete unused record_trace_results functionsMike Frysinger2-8/+4
2021-06-22sim: drop configure scripts for simple portsMike Frysinger2-0/+11
2021-06-21sim: unify hardware settingsMike Frysinger3-49/+5
2021-06-21sim: hw: rework configure option & device selectionMike Frysinger2-37/+29
2021-06-20sim: delete SIM_AC_COMMON macroMike Frysinger4-5/+5
2021-06-20sim: unify general maintainer settingsMike Frysinger3-124/+5
2021-06-20sim: unify cgen maintainer settingsMike Frysinger5-45/+6
2021-06-20sim: move sim-inline to the common codeMike Frysinger3-36/+5
2021-06-19sim: unify gettext/intl probing logicMike Frysinger2-85/+0
2021-06-19sim: unify toolchain dependency logicMike Frysinger2-1109/+1
2021-06-19sim: unify toolchain probing logicMike Frysinger2-1360/+26
2021-06-19sim: unify bfd library dependency testing logicMike Frysinger3-7691/+6
2021-06-19sim: unify various library testing logicMike Frysinger2-141/+6
2021-06-18sim: unify -Werror build settingsMike Frysinger3-112/+6
2021-06-18sim: move -Werror disabling to MakefileMike Frysinger4-39/+49
2021-06-18sim: split sim-signal.h include outMike Frysinger2-0/+5
2021-06-17sim: overhaul & unify endian settings managementMike Frysinger5-56/+11
2021-06-16sim: drop obsolete AC_EXEEXT callMike Frysinger2-2/+4
2021-06-16sim: drop arch-specific config.hMike Frysinger3-280/+47
2021-06-15sim: move dv-sockser define to CPPFLAGSMike Frysinger3-8/+5
2021-06-12sim: overhaul alignment settings managementMike Frysinger4-56/+8
2021-06-12sim: unify bug & package settingsMike Frysinger3-87/+2
2021-06-12sim: unify debug/stdio/trace/profile build settingsMike Frysinger2-150/+2
2021-06-12sim: unify environment build settingsMike Frysinger3-32/+2
2021-06-12sim: unify assert build settingsMike Frysinger4-28/+6
2021-06-12sim: unify platform function & header testsMike Frysinger3-552/+6
2021-06-09sim: cgen: inline cgen_init logicMike Frysinger3-5/+7
2021-05-17sim: cgen: invert sim_state storage for cgen portsMike Frysinger2-13/+6
2021-05-16sim: switch config.h usage to defs.hMike Frysinger5-2/+14
2021-05-16sim: riscv: move __int128 check to configureMike Frysinger3-2/+19
2021-05-12sim: clean up explicit environment build callsMike Frysinger3-23/+5
2021-05-04Add missing stdlib.h includes to simTom Tromey2-0/+5
2021-05-04sim: add support for build-time ar & ranlibMike Frysinger2-2/+14
2021-05-01sim: nrun: add local strsignal prototypeMike Frysinger3-2/+12
2021-04-26sim: enable hardware support by defaultMike Frysinger4-5/+120
2021-04-22Do not check for sys/time.h or sys/times.hTom Tromey3-14/+6
2021-04-22Remove and modernize dependencies in simTom Tromey2-7/+5
2021-04-22Require GNU makeTom Tromey2-67/+6
2021-04-21sim: regen against sim/m4/Mike Frysinger2-12/+16
2021-04-21sim: use -Werror when probing for supported warning flagsSimon Marchi2-1/+5
2021-04-18sim: switch to AC_CHECK_HEADERS_ONCEMike Frysinger1-52/+47
2021-04-18sim: switch to AC_CHECK_FUNCS_ONCE & merge a littleMike Frysinger2-25/+52
2021-04-12sim: cgen: move cgen_cpu_max_extra_bytes logic into the common codeMike Frysinger2-1/+5
2021-04-02sim: unify toolchain settingsMike Frysinger3-153/+162