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The bfin/msp430 ports already had trace logic set up for reading/writing
cpu registers, albeit using different unrelated levels (core & vpu). Add
a proper register class for these and for other ports.
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This helps standardize the configure --help output.
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Many ports have the same sim syscall logic, so add some helpers to handle
all the common details. The arches still have to deal with the unpacking
and packing of the syscall arguments, but the rest of the sim<->callback
glue is now shared.
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Almost every port implements these two callbacks in the same way, so
unify them in the common layer.
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A few places still refer to the configure.in file; update them.
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No code uses this anymore and the symbol conflicts with the new TRACE
helper. Punt it from configure.
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Replace the "if (TRACE_xxx_P) trace_generic" form with "TRACE_xxx".
The output is the same, but the code is nicer to read.
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These macros were copied from the Blackfin port but never used, so delete
them as part of the trace unification work.
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Since every target typedefs this the same way, move it to the common code.
We have to leave Blackfin behind here for now because of inter-dependencies
on types and headers: sim-base.h includes sim-model.h which needs types in
machs.h which needs types in bfim-sim.h which needs SIM_CPU.
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Almost every target defines sim_cia the same way -- either using the
address_word type directly, or a type of equivalent size. The only
odd one out is sh64 (who has 32bit address_word and 64bit cia), and
even that case doesn't seem to make sense. We'll put off clean up
though of sh64 and at least set up a sensible default for everyone.
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The CIA_{GET,SET} macros serve the same function as CPU_PC_{GET,SET}
except the latter adds a layer of indirection via the sim state. This
lets models set up different functions at runtime and doesn't reach so
directly into the arch-specific cpu state.
It also doesn't make sense to have two sets of macros that do exactly
the same thing, so lets standardize on the one that gets us more.
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Now that all the targets are utilizing CPU_PC_{FETCH,STORE}, and the
cpu state is multicore, and the STATE_CPU defines match, we can move
it all to the common code.
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This should be SIM, not GDB.
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This makes these two objects available to all sims by default.
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* arm/configure: Regenerated.
* avr/configure: Likewise.
* bfin/configure: Likewise.
* common/configure: Likewise.
* cr16/configure: Likewise.
* cris/configure: Likewise.
* d10v/configure: Likewise.
* erc32/configure: Likewise.
* frv/configure: Likewise.
* ft32/configure: Likewise.
* h8300/configure: Likewise.
* igen/configure: Likewise.
* iq2000/configure: Likewise.
* lm32/configure: Likewise.
* m32c/configure: Likewise.
* m32r/configure: Likewise.
* m68hc11/configure: Likewise.
* mcore/configure: Likewise.
* microblaze/configure: Likewise.
* mips/configure: Likewise.
* mn10300/configure: Likewise.
* moxie/configure: Likewise.
* msp430/configure: Likewise.
* ppc/configure: Likewise.
* rl78/configure: Likewise.
* rx/configure: Likewise.
* sh/configure: Likewise.
* sh64/configure: Likewise.
* v850/configure: Likewise.
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This variable was deleted in previous commits and is not used anymore.
Prune any stray references to it.
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* arm/configure: Regenerated.
* avr/configure: Likewise.
* bfin/configure: Likewise.
* common/configure: Likewise.
* cr16/configure: Likewise.
* cris/configure: Likewise.
* d10v/configure: Likewise.
* erc32/configure: Likewise.
* frv/configure: Likewise.
* ft32/configure: Likewise.
* h8300/configure: Likewise.
* igen/configure: Likewise.
* iq2000/configure: Likewise.
* lm32/configure: Likewise.
* m32c/configure: Likewise.
* m32r/configure: Likewise.
* m68hc11/configure: Likewise.
* mcore/configure: Likewise.
* microblaze/configure: Likewise.
* mips/configure: Likewise.
* mn10300/configure: Likewise.
* moxie/configure: Likewise.
* msp430/configure: Likewise.
* ppc/configure: Likewise.
* rl78/configure: Likewise.
* rx/configure: Likewise.
* sh/configure: Likewise.
* sh64/configure: Likewise.
* v850/configure: Likewise.
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With zlib being mandatory, and the updated m4 configs, we need to regen
and use the new settings w/bfd to avoid linkage errors.
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This header is used only with run.o, and both of these use nrun.o.
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Rather than manually include tconfig.h when we think we'll need it (which
is error prone as it can define symbols we expect from config.h), have it
be included directly by config.h. Since we know we have to include that
header everywhere already, this will make sure tconfig.h isn't missed.
It should also be fine as tconfig.h is supposed to be simple and only set
up a few core defines for the target.
This allows us to stop symlinking it in place all the time and just use
it straight out of the respective source directory.
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This triggers a bunch of new warnings, so fix some of them.
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We want people to stop using the run.c frontend, but it's hard to notice
when it's still set as the default. Lets flip things so nrun.c is the
default, and users of run.c will get an error by default. We turn that
error into a warning for existing sims so we don't break them -- this is
mostly meant for people starting new ports.
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* msp430-sim.c (sim_open): Allocate memory regions matching those
declared in the libgloss/msp430 linker scripts.
Allow sim_load_file to fail.
(get_op): Test the correct address bit when checking for out of
range addresses.
Include the address in the error message when an illegal access to
the hardware multiplier is detected.
(put_op): Test the correct address bit when checking for out of
range addresses.
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gdb/ChangeLog:
Update year range in copyright notice of all files.
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Directories that don't use libtool need to add -ldl (on most *nix
hosts) to provide dlopen for libbfd.
config/
* plugins.m4 (AC_PLUGINS): If plugins are enabled, add -ldl to
LIBS via AC_SEARCH_LIBS.
gdb/
* acinclude.m4 (GDB_AC_CHECK_BFD): Don't add -ldl.
* config.in: Regenerate.
sim/ppc/
* configure.ac: Invoke AC_PLUGINS.
* config.in: Regenerate.
and regen lots of configure files.
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state structure.
* msp430-sim.c: Move static hardware multiply support variables
from here...
* msp430-sim.h (msp430_cpu_state): ... into here ...
* msp430-sim.c (get_op, put_op): ... and update references to use
the msp430_cpu_state structure.
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* msp430-sim.c (get_op): Handle reads of low result register when
in MAC mode.
(put_op): Copy MAC result into result words.
Handle writes to the low result register.
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* msp43-sim.c (sign_ext): Change to "long long" to support
sign-extending 32-bit values.
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* msp430-sim.c (sim_open): Do not allocate memory over the
hardware multiply registers.
(get_op): Add support for reads from the hardware multiply
registers.
(put_op): Add support for writes to the hardware multiply
registers.
(msp430_step_once): Add support for the RETI instruction used by
the CPUX architecture.
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If we want to run a simple ELF, the reset vector isn't set up, so starting
at address 0 doesn't make sense. Use the ELF's entry point instead.
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This fix is simple:
msp430-sim.c: In function 'maybe_perform_syscall':
msp430-sim.c:898:10: warning: format '%d' expects argument of type 'int',
but argument 5 has type 'long int' [-Wformat]
This one we change to use casts like everyone else does in the code base:
msp430-sim.c: In function 'msp430_step_once':
msp430-sim.c:985:7: warning: passing argument 3 of 'init_disassemble_info'
from incompatible pointer type [enabled by default]
include/dis-asm.h:368:13: note: expected 'fprintf_ftype' but argument is
of type 'int (*)(struct FILE * __restrict__, const char * __restrict__)'
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libtool.m4.
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* configure.tgt: Add it.
* configure: Regenerate.
* gennltvals.sh: Add msp430 support.
* nltvals.def: Regenerate.
* Makefile.in: New.
* aclocal.m4: Generate.
* config.in: Generate.
* configure.ac: New.
* configure: Generate.
* msp430-sim.c: New.
* msp430-sim.h: New.
* sim-main.h: New.
* trace.c: New.
* trace.h: New.
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