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2021-01-01Update copyright year range in all GDB filesJoel Brobecker1-1/+1
This commits the result of running gdb/copyright.py as per our Start of New Year procedure... gdb/ChangeLog Update copyright year range in copyright header of all GDB files.
2020-08-07MSP430: sim: Increase main memory region sizeJozef Lawrynowicz1-1/+1
The area between 0xFF00 and 0xFFC0 is unallocated in the simulator memory map, so extend the main memory region up to 0xFFC0 to allow the simulator to make use of the extra 192 bytes of space. sim/msp430/ChangeLog: * msp430-sim.c (sim_open): Increase the size of the main memory region to 0xFAC0.
2020-08-05MSP430: sim: Fix incorrect simulation of unsigned widening multiplyJozef Lawrynowicz1-8/+20
Operand sizes used for simulation of MSP430 hardware multiply operations are not aligned with the sizes used on the target, resulting in the simulator storing signed operands with too much precision. Additionally, simulation of unsigned multiplication is missing explicit casts to prevent any implicit sign extension. gcc.c-torture/execute/pr91450-1.c uses unsigned widening multiplication of 32-bit operands -4 and 2, to produce a 64-bit result: 0xffff fffc * 0x2 = 0x1 ffff fff8 If -4 is stored in 64-bit precision, then the multiplication is essentially signed and the result is -8 in 64-bit precision (0xffff ffff ffff fffc), which is not correct. sim/msp430/ChangeLog: * msp430-sim.c (put_op): For unsigned multiplication, explicitly cast operands to the unsigned type before multiplying. * msp430-sim.h (struct msp430_cpu_state): Fix types used to store hwmult operands. sim/testsuite/sim/msp430/ChangeLog: * mpyull_hwmult.s: New test.
2020-01-22MSP430: Fix simulator execution of RRUX instructionJozef Lawrynowicz1-2/+4
The MSP430X RRUX instruction (unsigned right shift) is synthesized as the RRC (rotate right through carry) instruction, but with the ZC (zero carry) bit of the opcode extention word set. Ensure the carry flag is ignored when the ZC bit is set. sim/msp430/ChangeLog: 2020-01-22 Jozef Lawrynowicz <jozef.l@mittosystems.com> * msp430-sim.c (msp430_step_once): Ignore the carry flag when executing an RRC instruction, if the ZC bit of the extension word is set. sim/testsuite/sim/msp430/ChangeLog: 2020-01-22 Jozef Lawrynowicz <jozef.l@mittosystems.com> * rrux.s: New test.
2020-01-01Update copyright year range in all GDB files.Joel Brobecker1-1/+1
gdb/ChangeLog: Update copyright year range in all GDB files.
2019-01-01Update copyright year range in all GDB files.Joel Brobecker1-1/+1
This commit applies all changes made after running the gdb/copyright.py script. Note that one file was flagged by the script, due to an invalid copyright header (gdb/unittests/basic_string_view/element_access/char/empty.cc). As the file was copied from GCC's libstdc++-v3 testsuite, this commit leaves this file untouched for the time being; a patch to fix the header was sent to gcc-patches first. gdb/ChangeLog: Update copyright year range in all GDB files.
2018-01-02Update copyright year range in all GDB filesJoel Brobecker1-1/+1
gdb/ChangeLog: Update copyright year range in all GDB files
2017-08-29Fix simulation of MSP430's open system call.Jozef Lawrynowicz1-10/+25
* sim/msp430/msp430-sim.c (maybe_perform_syscall): Fix passing of arguments for variadic syscall "open".
2017-01-01update copyright year range in GDB filesJoel Brobecker1-1/+1
This applies the second part of GDB's End of Year Procedure, which updates the copyright year range in all of GDB's files. gdb/ChangeLog: Update copyright year range in all GDB files.
2016-08-15sim: unify symbol table handlingMike Frysinger1-43/+3
The common sim tracing code already handles loading and tracking of symbols from the target program so that it can show symbol info in trace/disassembly calls. Once we touch up the trace code and add a few API callbacks, ports don't need to do loading and searching of symbol tables themselves anymore.
2016-01-06sim: sim_{create_inferior,open,parse_args}: constify argv/env slightlyMike Frysinger1-3/+3
2016-01-03 Mike Frysinger <vapier@gentoo.org> * sim-options.c (sim_parse_args): Mark argv array const. * sim-options.h (sim_parse_args): Likewise.
2016-01-05sim: msp430: drop duplicate sim_load_file callMike Frysinger1-26/+7
There's no need, or desire, to call sim_load_file from sim_open. The higher levels (gdb/run) take care of calling sim_load for us already.
2016-01-05sim: msp430: switch to common disassembler tracingMike Frysinger1-39/+2
The output format is a bit different, but the new form matches all the other trace lines. Otherwise, it should be functionally equivalent.
2016-01-01GDB copyright headers update after running GDB's copyright.py script.Joel Brobecker1-1/+1
gdb/ChangeLog: Update year range in copyright notice of all files.
2015-12-27sim: aarch64/msp430: fix disassembler usageMike Frysinger1-2/+2
The disasm framework reserves the private_data field for the disassemblers themselves, not for people who use the disassembler. Instead, there is an application_data field for callers such as the sim. Switch to it to avoid random corruption/crashes when the disassemblers use private_data.
2015-12-15Fix invalid left shift of negative valueDominik Vogt1-2/+2
Fix occurrences of left-shifting negative constants in C code. sim/arm/ChangeLog: * thumbemu.c (handle_T2_insn): Fix left shift of negative value. * armemu.c (handle_v6_insn): Likewise. sim/avr/ChangeLog: * interp.c (sign_ext): Fix left shift of negative value. sim/mips/ChangeLog: * micromips.igen (process_isa_mode): Fix left shift of negative value. sim/msp430/ChangeLog: * msp430-sim.c (get_op, put_op): Fix left shift of negative value. sim/v850/ChangeLog: * simops.c (v850_bins): Fix left shift of negative value.
2015-12-07Add support for MSP430 F5 hardware multiply.Nick Clifton1-10/+52
* msp430-sim.c (sim_open): Check for needed memory at address 0x500 not 0x200. (get_op): Add support for F5 hardware multiply addresses. (put_op): Likewise.
2015-11-15sim: sim-close: unify sim_close logicMike Frysinger1-3/+1
Other than the nice advantage of all sims having to declare one fewer common function, this also fixes leakage in pretty much every sim. Many were not freeing any resources, and a few were inconsistent as to the ones they did. Now we have a single module that takes care of all the logic for us. Most of the non-cgen based ones could be deleted outright. The cgen ones required adding a callback to the arch-specific cleanup func. The few that still have close callbacks are to manage their internal state. We do not convert erc32, m32c, ppc, rl78, or rx as they do not use the common sim core.
2015-06-24sim: trace: add a basic cpu register classMike Frysinger1-2/+2
The bfin/msp430 ports already had trace logic set up for reading/writing cpu registers, albeit using different unrelated levels (core & vpu). Add a proper register class for these and for other ports.
2015-06-17sim: syscall: add common sim_syscall helpersMike Frysinger1-56/+8
Many ports have the same sim syscall logic, so add some helpers to handle all the common details. The arches still have to deal with the unpacking and packing of the syscall arguments, but the rest of the sim<->callback glue is now shared.
2015-06-17sim: syscall: unify memory helpersMike Frysinger1-22/+3
Almost every port implements these two callbacks in the same way, so unify them in the common layer.
2015-06-12sim: msp430: use new common trace print helpersMike Frysinger1-109/+55
Replace the "if (TRACE_xxx_P) trace_generic" form with "TRACE_xxx". The output is the same, but the code is nicer to read.
2015-03-14sim: msp430: use common warnings optionsMike Frysinger1-0/+2
This triggers a bunch of new warnings, so fix some of them.
2015-02-24Fix the detection of illegal memory accesses in the MSP430 simulator.Nick Clifton1-34/+55
* msp430-sim.c (sim_open): Allocate memory regions matching those declared in the libgloss/msp430 linker scripts. Allow sim_load_file to fail. (get_op): Test the correct address bit when checking for out of range addresses. Include the address in the error message when an illegal access to the hardware multiplier is detected. (put_op): Test the correct address bit when checking for out of range addresses.
2015-01-01Update year range in copyright notice of all files owned by the GDB project.Joel Brobecker1-1/+1
gdb/ChangeLog: Update year range in copyright notice of all files.
2014-08-19Replace static variables in the MSP430 simulator with fields in the cpu ↵Nick Clifton1-66/+72
state structure. * msp430-sim.c: Move static hardware multiply support variables from here... * msp430-sim.h (msp430_cpu_state): ... into here ... * msp430-sim.c (get_op, put_op): ... and update references to use the msp430_cpu_state structure.
2014-06-03Fix a small but in the emulation of the MSP430 hardware multiply.Nick Clifton1-3/+30
* msp430-sim.c (get_op): Handle reads of low result register when in MAC mode. (put_op): Copy MAC result into result words. Handle writes to the low result register.
2014-05-12Support 32->64 sign extension in msp430's sign_extDJ Delorie1-4/+4
* msp43-sim.c (sign_ext): Change to "long long" to support sign-extending 32-bit values.
2014-05-08Add support for emulating the MSP430 hardware multiply feature.Nick Clifton1-23/+181
* msp430-sim.c (sim_open): Do not allocate memory over the hardware multiply registers. (get_op): Add support for reads from the hardware multiply registers. (put_op): Add support for writes to the hardware multiply registers. (msp430_step_once): Add support for the RETI instruction used by the CPUX architecture.
2014-03-10sim: msp430: set initial PC to ELF entry if availableMike Frysinger1-1/+6
If we want to run a simple ELF, the reset vector isn't set up, so starting at address 0 doesn't make sense. Use the ELF's entry point instead.
2014-03-10sim: msp430: fix build time warningsMike Frysinger1-2/+2
This fix is simple: msp430-sim.c: In function 'maybe_perform_syscall': msp430-sim.c:898:10: warning: format '%d' expects argument of type 'int', but argument 5 has type 'long int' [-Wformat] This one we change to use casts like everyone else does in the code base: msp430-sim.c: In function 'msp430_step_once': msp430-sim.c:985:7: warning: passing argument 3 of 'init_disassemble_info' from incompatible pointer type [enabled by default] include/dis-asm.h:368:13: note: expected 'fprintf_ftype' but argument is of type 'int (*)(struct FILE * __restrict__, const char * __restrict__)'
2014-01-01Update Copyright year range in all files maintained by GDB.Joel Brobecker1-1/+1
2013-06-21 * msp430: New Directory.Nick Clifton1-0/+1425
* configure.tgt: Add it. * configure: Regenerate. * gennltvals.sh: Add msp430 support. * nltvals.def: Regenerate. * Makefile.in: New. * aclocal.m4: Generate. * config.in: Generate. * configure.ac: New. * configure: Generate. * msp430-sim.c: New. * msp430-sim.h: New. * sim-main.h: New. * trace.c: New. * trace.h: New.
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