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path: root/sim/msp430/msp430-sim.c
AgeCommit message (Expand)AuthorFilesLines
2023-12-19sim: msp430: fix -Wunused-variable warningsMike Frysinger1-5/+2
2023-12-07sim: msp430: fix -Wunused-but-set-variable warningsMike Frysinger1-2/+1
2023-01-01Update copyright year range in header of all files managed by GDBJoel Brobecker1-1/+1
2022-12-25sim: cpu: change default init to handle all cpusMike Frysinger1-1/+1
2022-12-25sim: msp430: add basic SMP cpu initMike Frysinger1-12/+16
2022-12-23sim: msp430: move arch-specific settings to internal headerMike Frysinger1-0/+2
2022-12-21sim: msp430: invert sim_cpu storageMike Frysinger1-110/+102
2022-11-02sim: common: change sim_{fetch,store}_register helpers to use void* buffersMike Frysinger1-11/+15
2022-10-31sim: reg: constify store helperMike Frysinger1-1/+1
2022-01-06sim: msp430: migrate to standard uintXX_t typesMike Frysinger1-6/+6
2022-01-01Automatic Copyright Year update after running gdb/copyright.pyJoel Brobecker1-1/+1
2021-11-15sim: split program path out of argv vectorMike Frysinger1-4/+1
2021-10-31sim: drop unused targ-vals.h includesMike Frysinger1-1/+0
2021-06-18sim: split sim-signal.h include outMike Frysinger1-0/+1
2021-06-17sim: overhaul & unify endian settings managementMike Frysinger1-0/+3
2021-05-16sim: switch config.h usage to defs.hMike Frysinger1-1/+3
2021-04-12sim: cgen: move cgen_cpu_max_extra_bytes logic into the common codeMike Frysinger1-1/+1
2021-01-01Update copyright year range in all GDB filesJoel Brobecker1-1/+1
2020-08-07MSP430: sim: Increase main memory region sizeJozef Lawrynowicz1-1/+1
2020-08-05MSP430: sim: Fix incorrect simulation of unsigned widening multiplyJozef Lawrynowicz1-8/+20
2020-01-22MSP430: Fix simulator execution of RRUX instructionJozef Lawrynowicz1-2/+4
2020-01-01Update copyright year range in all GDB files.Joel Brobecker1-1/+1
2019-01-01Update copyright year range in all GDB files.Joel Brobecker1-1/+1
2018-01-02Update copyright year range in all GDB filesJoel Brobecker1-1/+1
2017-08-29Fix simulation of MSP430's open system call.Jozef Lawrynowicz1-10/+25
2017-01-01update copyright year range in GDB filesJoel Brobecker1-1/+1
2016-08-15sim: unify symbol table handlingMike Frysinger1-43/+3
2016-01-06sim: sim_{create_inferior,open,parse_args}: constify argv/env slightlyMike Frysinger1-3/+3
2016-01-05sim: msp430: drop duplicate sim_load_file callMike Frysinger1-26/+7
2016-01-05sim: msp430: switch to common disassembler tracingMike Frysinger1-39/+2
2016-01-01GDB copyright headers update after running GDB's copyright.py script.Joel Brobecker1-1/+1
2015-12-27sim: aarch64/msp430: fix disassembler usageMike Frysinger1-2/+2
2015-12-15Fix invalid left shift of negative valueDominik Vogt1-2/+2
2015-12-07Add support for MSP430 F5 hardware multiply.Nick Clifton1-10/+52
2015-11-15sim: sim-close: unify sim_close logicMike Frysinger1-3/+1
2015-06-24sim: trace: add a basic cpu register classMike Frysinger1-2/+2
2015-06-17sim: syscall: add common sim_syscall helpersMike Frysinger1-56/+8
2015-06-17sim: syscall: unify memory helpersMike Frysinger1-22/+3
2015-06-12sim: msp430: use new common trace print helpersMike Frysinger1-109/+55
2015-03-14sim: msp430: use common warnings optionsMike Frysinger1-0/+2
2015-02-24Fix the detection of illegal memory accesses in the MSP430 simulator.Nick Clifton1-34/+55
2015-01-01Update year range in copyright notice of all files owned by the GDB project.Joel Brobecker1-1/+1
2014-08-19Replace static variables in the MSP430 simulator with fields in the cpu state...Nick Clifton1-66/+72
2014-06-03Fix a small but in the emulation of the MSP430 hardware multiply.Nick Clifton1-3/+30
2014-05-12Support 32->64 sign extension in msp430's sign_extDJ Delorie1-4/+4
2014-05-08Add support for emulating the MSP430 hardware multiply feature.Nick Clifton1-23/+181
2014-03-10sim: msp430: set initial PC to ELF entry if availableMike Frysinger1-1/+6
2014-03-10sim: msp430: fix build time warningsMike Frysinger1-2/+2
2014-01-01Update Copyright year range in all files maintained by GDB.Joel Brobecker1-1/+1
2013-06-21 * msp430: New Directory.Nick Clifton1-0/+1425