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AgeCommit message (Expand)AuthorFilesLines
1997-01-23 * configure configure.in Makefile.in: Update to new configureStu Grossman4-1/+1874
1997-01-21 * simops.c: Undo last change to "rol" and "ror", original codeJeff Law2-2/+7
1997-01-16 * simops.c: Fix "rol" and "ror".Jeff Law2-2/+10
1997-01-15 * simops.c: Fix typo in last change.Jeff Law1-1/+1
1997-01-13 * simops.c: Use REG macros in few places not using them yet.Jeff Law2-5/+9
1997-01-06 * mn10300_sim.h (struct _state): Fix number of registers!Jeff Law1-0/+4
1996-12-31 * mn10300_sim.h (struct _state): Put all registers into a singleJeff Law3-53/+51
1996-12-18 * interp.c (sim_resume): Handle 0xff as a single byte insn.Jeff Law2-12/+19
1996-12-16 * simops.c: Handle "break" instruction.Jeff Law2-0/+12
1996-12-16 * simops.c: Fix restoring the PC for "ret" and "retf" instructions.Jeff Law2-4/+23
1996-12-11 * gencode.c (write_opcodes): Also write out the format of theJeff Law1-3/+4
1996-12-10 * simops.c (REG0_4): Define.Jeff Law2-8/+14
1996-12-07 * simops.c (REG0_16): Fix typo.Jeff Law2-1/+5
1996-12-07Add missing semicolons in last change.Jeff Law1-13/+13
1996-12-06 * simops.c: Call abort for any instruction that's not currentlyJeff Law2-0/+16
1996-12-06 * simops.c: Define accessor macros to extract registerJeff Law2-368/+329
1996-12-06 * interp.c: Delete unused global variable "OP".Jeff Law3-31/+30
1996-12-06Opps. Forgot something in last change.Jeff Law1-1/+1
1996-12-06 * gencode.c (write_header): Add "insn" and "extension" argumentsJeff Law5-248/+699
1996-12-06 * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)"Jeff Law2-3/+5
1996-12-06 * simops.c: Fix thinkos in last change to "inc dn".Jeff Law2-5/+11
1996-12-04 * simops.c: "add imm,sp" does not effect the condition codes.Jeff Law2-31/+20
1996-12-04 * simops.c: Treat both operands as signed values forJeff Law2-2/+13
1996-12-04 * simops.c: Fix simulation of division instructions.Jeff Law1-12/+8
1996-12-02 * simomps.c: Fix carry bit handling in "sub" and "cmp"Jeff Law1-9/+9
1996-12-02 * simops.c: Fix "mov imm8,an" and "mov imm16,dn".Jeff Law2-2/+6
1996-12-02 * simops.c: Fix overflow computation for many instructions.Jeff Law2-87/+89
1996-12-02 * simops.c: Fix "movdm, an", "movbu dm, (an)", and "movhu dm, (an)".Jeff Law2-5/+7
1996-12-02 * simops.c: Fix "mov am, dn".Jeff Law2-1/+3
1996-12-01 * simops.c: Fix more bugs in "add imm,an" andJeff Law2-8/+13
1996-11-27 * simops.c: Fix bugs in "movm" and "add imm,an".Jeff Law2-17/+19
1996-11-27 * simops.c: Don't lose the upper 24 bits of the returnJeff Law2-16/+154
1996-11-27 * simops.c: Implement the remaining 5, 6 and 7 byte instructions.Jeff Law2-50/+168
1996-11-27 * simops.c Implement remaining 4 byte instructions.Jeff Law2-39/+145
1996-11-27 * simops.c Implement remaining 3 byte instructions.Jeff Law2-32/+120
1996-11-27 * simops.c: Implement remaining 2 byte instructions. CallJeff Law2-23/+120
1996-11-27 * simops.c: Implement lots of random instructions.Jeff Law2-129/+642
1996-11-27 * simops.c: Implement "movm" and "bCC" insns.Jeff Law2-7/+160
1996-11-27 * mn10300_sim.h (_state): Add another register (MDR).Jeff Law3-9/+199
1996-11-26 * mn10300_sim.h (PSW_*): Define for CC status tracking.Jeff Law3-20/+310
1996-11-26 * gencode.c, interp.c: Snapshot current simulator code.Jeff Law3-3/+27
1996-11-25 * Makefile.in, config.in, configure, configure.in: New files.Jeff Law7-0/+1950