| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 1996-12-11 | * gencode.c (write_opcodes): Also write out the format of the | Jeff Law | 1 | -3/+4 |
| 1996-12-10 | * simops.c (REG0_4): Define. | Jeff Law | 2 | -8/+14 |
| 1996-12-07 | * simops.c (REG0_16): Fix typo. | Jeff Law | 2 | -1/+5 |
| 1996-12-07 | Add missing semicolons in last change. | Jeff Law | 1 | -13/+13 |
| 1996-12-06 | * simops.c: Call abort for any instruction that's not currently | Jeff Law | 2 | -0/+16 |
| 1996-12-06 | * simops.c: Define accessor macros to extract register | Jeff Law | 2 | -368/+329 |
| 1996-12-06 | * interp.c: Delete unused global variable "OP". | Jeff Law | 3 | -31/+30 |
| 1996-12-06 | Opps. Forgot something in last change. | Jeff Law | 1 | -1/+1 |
| 1996-12-06 | * gencode.c (write_header): Add "insn" and "extension" arguments | Jeff Law | 5 | -248/+699 |
| 1996-12-06 | * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)" | Jeff Law | 2 | -3/+5 |
| 1996-12-06 | * simops.c: Fix thinkos in last change to "inc dn". | Jeff Law | 2 | -5/+11 |
| 1996-12-04 | * simops.c: "add imm,sp" does not effect the condition codes. | Jeff Law | 2 | -31/+20 |
| 1996-12-04 | * simops.c: Treat both operands as signed values for | Jeff Law | 2 | -2/+13 |
| 1996-12-04 | * simops.c: Fix simulation of division instructions. | Jeff Law | 1 | -12/+8 |
| 1996-12-02 | * simomps.c: Fix carry bit handling in "sub" and "cmp" | Jeff Law | 1 | -9/+9 |
| 1996-12-02 | * simops.c: Fix "mov imm8,an" and "mov imm16,dn". | Jeff Law | 2 | -2/+6 |
| 1996-12-02 | * simops.c: Fix overflow computation for many instructions. | Jeff Law | 2 | -87/+89 |
| 1996-12-02 | * simops.c: Fix "movdm, an", "movbu dm, (an)", and "movhu dm, (an)". | Jeff Law | 2 | -5/+7 |
| 1996-12-02 | * simops.c: Fix "mov am, dn". | Jeff Law | 2 | -1/+3 |
| 1996-12-01 | * simops.c: Fix more bugs in "add imm,an" and | Jeff Law | 2 | -8/+13 |
| 1996-11-27 | * simops.c: Fix bugs in "movm" and "add imm,an". | Jeff Law | 2 | -17/+19 |
| 1996-11-27 | * simops.c: Don't lose the upper 24 bits of the return | Jeff Law | 2 | -16/+154 |
| 1996-11-27 | * simops.c: Implement the remaining 5, 6 and 7 byte instructions. | Jeff Law | 2 | -50/+168 |
| 1996-11-27 | * simops.c Implement remaining 4 byte instructions. | Jeff Law | 2 | -39/+145 |
| 1996-11-27 | * simops.c Implement remaining 3 byte instructions. | Jeff Law | 2 | -32/+120 |
| 1996-11-27 | * simops.c: Implement remaining 2 byte instructions. Call | Jeff Law | 2 | -23/+120 |
| 1996-11-27 | * simops.c: Implement lots of random instructions. | Jeff Law | 2 | -129/+642 |
| 1996-11-27 | * simops.c: Implement "movm" and "bCC" insns. | Jeff Law | 2 | -7/+160 |
| 1996-11-27 | * mn10300_sim.h (_state): Add another register (MDR). | Jeff Law | 3 | -9/+199 |
| 1996-11-26 | * mn10300_sim.h (PSW_*): Define for CC status tracking. | Jeff Law | 3 | -20/+310 |
| 1996-11-26 | * gencode.c, interp.c: Snapshot current simulator code. | Jeff Law | 3 | -3/+27 |
| 1996-11-25 | * Makefile.in, config.in, configure, configure.in: New files. | Jeff Law | 7 | -0/+1950 |
