| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 1997-01-21 | * simops.c: Undo last change to "rol" and "ror", original code | Jeff Law | 1 | -0/+5 |
| 1997-01-16 | * simops.c: Fix "rol" and "ror". | Jeff Law | 1 | -0/+8 |
| 1997-01-13 | * simops.c: Use REG macros in few places not using them yet. | Jeff Law | 1 | -0/+4 |
| 1997-01-06 | * mn10300_sim.h (struct _state): Fix number of registers! | Jeff Law | 1 | -0/+4 |
| 1996-12-31 | * mn10300_sim.h (struct _state): Put all registers into a single | Jeff Law | 1 | -0/+8 |
| 1996-12-18 | * interp.c (sim_resume): Handle 0xff as a single byte insn. | Jeff Law | 1 | -0/+7 |
| 1996-12-16 | * simops.c: Handle "break" instruction. | Jeff Law | 1 | -0/+2 |
| 1996-12-16 | * simops.c: Fix restoring the PC for "ret" and "retf" instructions. | Jeff Law | 1 | -0/+11 |
| 1996-12-10 | * simops.c (REG0_4): Define. | Jeff Law | 1 | -0/+5 |
| 1996-12-07 | * simops.c (REG0_16): Fix typo. | Jeff Law | 1 | -0/+4 |
| 1996-12-06 | * simops.c: Call abort for any instruction that's not currently | Jeff Law | 1 | -0/+3 |
| 1996-12-06 | * simops.c: Define accessor macros to extract register | Jeff Law | 1 | -0/+3 |
| 1996-12-06 | * interp.c: Delete unused global variable "OP". | Jeff Law | 1 | -0/+5 |
| 1996-12-06 | * gencode.c (write_header): Add "insn" and "extension" arguments | Jeff Law | 1 | -0/+11 |
| 1996-12-06 | * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)" | Jeff Law | 1 | -1/+3 |
| 1996-12-06 | * simops.c: Fix thinkos in last change to "inc dn". | Jeff Law | 1 | -0/+4 |
| 1996-12-04 | * simops.c: "add imm,sp" does not effect the condition codes. | Jeff Law | 1 | -0/+5 |
| 1996-12-04 | * simops.c: Treat both operands as signed values for | Jeff Law | 1 | -0/+11 |
| 1996-12-02 | * simops.c: Fix "mov imm8,an" and "mov imm16,dn". | Jeff Law | 1 | -0/+4 |
| 1996-12-02 | * simops.c: Fix overflow computation for many instructions. | Jeff Law | 1 | -0/+2 |
| 1996-12-02 | * simops.c: Fix "movdm, an", "movbu dm, (an)", and "movhu dm, (an)". | Jeff Law | 1 | -0/+2 |
| 1996-12-02 | * simops.c: Fix "mov am, dn". | Jeff Law | 1 | -0/+2 |
| 1996-12-01 | * simops.c: Fix more bugs in "add imm,an" and | Jeff Law | 1 | -0/+5 |
| 1996-11-27 | * simops.c: Fix bugs in "movm" and "add imm,an". | Jeff Law | 1 | -0/+2 |
| 1996-11-27 | * simops.c: Don't lose the upper 24 bits of the return | Jeff Law | 1 | -0/+4 |
| 1996-11-27 | * simops.c: Implement the remaining 5, 6 and 7 byte instructions. | Jeff Law | 1 | -0/+2 |
| 1996-11-27 | * simops.c Implement remaining 4 byte instructions. | Jeff Law | 1 | -1/+3 |
| 1996-11-27 | * simops.c Implement remaining 3 byte instructions. | Jeff Law | 1 | -0/+2 |
| 1996-11-27 | * simops.c: Implement remaining 2 byte instructions. Call | Jeff Law | 1 | -0/+5 |
| 1996-11-27 | * simops.c: Implement lots of random instructions. | Jeff Law | 1 | -0/+2 |
| 1996-11-27 | * simops.c: Implement "movm" and "bCC" insns. | Jeff Law | 1 | -0/+2 |
| 1996-11-27 | * mn10300_sim.h (_state): Add another register (MDR). | Jeff Law | 1 | -0/+5 |
| 1996-11-26 | * mn10300_sim.h (PSW_*): Define for CC status tracking. | Jeff Law | 1 | -1/+6 |
| 1996-11-26 | * gencode.c, interp.c: Snapshot current simulator code. | Jeff Law | 1 | -0/+4 |
| 1996-11-25 | * Makefile.in, config.in, configure, configure.in: New files. | Jeff Law | 1 | -0/+5 |
