Age | Commit message (Expand) | Author | Files | Lines |
1997-11-26 | Fix typo in format argument to sim_io_eprintf. | Andrew Cagney | 2 | -3/+5 |
1997-11-26 | Move MDMX instructions which are public knowledge from vr5400.igen | Andrew Cagney | 4 | -441/+1313 |
1997-11-25 | sanitize-r5900 not v5900 | Andrew Cagney | 1 | -2/+2 |
1997-11-25 | vr5400 sanitize cleanups | Andrew Cagney | 1 | -4/+12 |
1997-11-24 | Sanitization | Andrew Cagney | 1 | -1/+0 |
1997-11-20 | o Add SIM_SIGFPE to sim-signals | Andrew Cagney | 3 | -18/+12 |
1997-11-20 | Allow reads/writes to C0_CONFIG register. | Andrew Cagney | 3 | -13/+40 |
1997-11-18 | * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS). | Doug Evans | 1 | -0/+4 |
1997-11-14 | * mips.igen: Tag vr5000 instructions. | Andrew Cagney | 2 | -0/+35 |
1997-11-11 | Make the signess of compares between GPR's explicit using a cast to | Andrew Cagney | 2 | -61/+39 |
1997-11-11 | Fix IGEN version of MFC0, MTC0, SWC1, LWC1, SDC1, LDC1, LWXC1, | Andrew Cagney | 5 | -121/+396 |
1997-11-06 | Replace global IPC with function argument cia or current instruction | Andrew Cagney | 5 | -60/+78 |
1997-11-06 | IGEN likes to cache the current instruction address (CIA). Change the | Andrew Cagney | 5 | -112/+172 |
1997-11-05 | Add option --enable-sim-igen to mips configuration. Allows user to | Andrew Cagney | 2 | -17/+50 |
1997-11-05 | Rewrite the MIPS simulator's memory model so that it uses the generic | Andrew Cagney | 5 | -544/+225 |
1997-11-05 | Delete -l and -n options, didn't do anything. | Andrew Cagney | 3 | -51/+28 |
1997-11-05 | Rewrite sim_monitor (implements read, write, open, et.al. system | Andrew Cagney | 3 | -323/+249 |
1997-11-04 | Correct r5900 sanitization. | Gavin Romig-Koch | 2 | -1/+3 |
1997-10-29 | * gencode.c: Add tx49 configury and insns. | Gavin Romig-Koch | 5 | -15/+97 |
1997-10-29 | common/sim-bits.h: Document ROTn macro. | Andrew Cagney | 6 | -22/+720 |
1997-10-28 | Add support for 16 byte quantities to sim-endian macro H2T. | Andrew Cagney | 2 | -26/+30 |
1997-10-27 | Separate r5900 specifoc and mips16 instructions. | Andrew Cagney | 9 | -5179/+2770 |
1997-10-27 | Add mips64vr5400 to configuration list | Andrew Cagney | 6 | -38/+636 |
1997-10-25 | * sim/mips/gencode.c (build_instruction): Follow sim_write's lead in using | Gavin Romig-Koch | 2 | -1/+7 |
1997-10-24 | Add basic igen configuration to autoconf. Disable. | Andrew Cagney | 4 | -18/+244 |
1997-10-24 | Add function to fetch 32bit instructions | Andrew Cagney | 4 | -119/+154 |
1997-10-24 | Checkpoint IGEN version of mips sim | Andrew Cagney | 1 | -152/+157 |
1997-10-21 | Use SIM*_OVERFLOW_RESULT defined in sim-alu.h | Andrew Cagney | 2 | -2/+7 |
1997-10-21 | Output pc profile statistics once gathered. | Andrew Cagney | 2 | -9/+5 |
1997-10-21 | Delete profile support from MIPS simulator, use sim/common/sim-profile | Andrew Cagney | 4 | -225/+19 |
1997-10-20 | Make mips registers of type unsigned_word. | Andrew Cagney | 3 | -3/+14 |
1997-10-16 | Move register definitions and macros out of interp.c and into sim-main.h | Andrew Cagney | 4 | -274/+362 |
1997-10-16 | Checkpoint IGEN version of MIPS simulator. | Andrew Cagney | 1 | -248/+218 |
1997-10-16 | Rename generated file engine.c to oengine.c. | Andrew Cagney | 3 | -6/+13 |
1997-10-16 | * gencode.c (build_instruction): Use FPR_STATE not fpr_state. | Andrew Cagney | 2 | -6/+10 |
1997-10-16 | * gencode.c (build_instruction): For "FPSQRT", output correct number | Andrew Cagney | 2 | -1/+8 |
1997-10-14 | Checkpoint IGEN version of MIPS simulator. | Andrew Cagney | 1 | -1239/+1196 |
1997-10-14 | Move global MIPS simulator variables into sim_cpu struct. | Andrew Cagney | 4 | -330/+369 |
1997-10-14 | o Add support for configuring wordsize, fp hardware and target | Andrew Cagney | 8 | -543/+822 |
1997-10-09 | Snap. Gets through igen's checks. | Andrew Cagney | 1 | -322/+104 |
1997-10-08 | MIPS/IGEN checkpoint - doesn't build. | Andrew Cagney | 3 | -0/+10004 |
1997-10-07 | Checkpoint IGEN input file for MIPS simulator. | Andrew Cagney | 1 | -0/+2 |
1997-09-30 | Add access to hi part of r5900 128 bit registers. | Andrew Cagney | 1 | -0/+13 |
1997-09-29 | * configure: Regenerated. | Bob Manson | 1 | -0/+4 |
1997-09-26 | * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB. | Mark Alexander | 2 | -7/+108 |
1997-09-25 | Add/use SIM_AC_OPTION_BITSIZE. | Andrew Cagney | 1 | -10/+34 |
1997-09-25 | Allow gencode.c to generate input to the igen generator. | Andrew Cagney | 2 | -201/+489 |
1997-09-25 | Pacify GCC -Wall | Andrew Cagney | 1 | -0/+5 |
1997-09-23 | vr5900-r5900. | Jeff Law | 1 | -1/+1 |
1997-09-23 | Remove need to update <targ>/Makefile.in when adding optional options | Andrew Cagney | 3 | -69/+160 |