Age | Commit message (Collapse) | Author | Files | Lines |
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2000-03-21 Frank Ch. Eigler <fche@redhat.com>
* interp.c (sim_open): Sort & extend dummy memory regions for
--board=jmr3904 for eCos.
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* merge from internal repo -> sourceware
2000-03-02 Frank Ch. Eigler <fche@redhat.com>
* configure: Regenerated.
Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
* interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
calls, conditional on the simulator being in verbose mode.
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1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
* dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
CPU, start periodic background I/O polls.
(tx3904sio_poll): New function: periodic I/O poller.
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[ChangeLog]
1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
* mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
start-sanitize-sky
* interp.c (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook.
Call sim_engine_halt on BreakPoint.
end-sanitize-sky
[ChangeLog.sky]
1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
* sky-gdb.c (sky_sim_engine_halt): Do not set CIA here.
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* configure.in, configure (mips64vr5*-*-*): Added missing ;; in
case statement.
(actually a sanitize-cygnus mistake, but Rainer doesn't know that)
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1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
* interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
(load_word): Call SIM_CORE_SIGNAL hook on error.
(signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
starting. For exception dispatching, pass PC instead of NULL_CIA.
(decode_coproc): Use COP0_BADVADDR to store faulting address.
* sim-main.h (COP0_BADVADDR): Define.
(SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
(SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
(_sim_cpu): Add exc_* fields to store register value snapshots.
* mips.igen (*): Replace memory-related SignalException* calls
with references to SIM_CORE_SIGNAL hook.
* dv-tx3904irc.c (tx3904irc_port_event): printf format warning
fix.
* sim-main.c (*): Minor warning cleanups.
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* archures.c,bfd-in2.h (bfd_mach_mips4121): New.
* cpu-mips.c: Added vr4121.
* elf32-mips.c (elf_mips_mach): Same.
(_bfd_mips_elf_final_write_processing): Same.
for gas:
* config/tc-mips.c (mips_4121): New.
(md_begin,mips_ip,md_longopts,md_parse_option): Add vr4121.
for gcc:
* config/mips/mips.c (override_options): Add vr4121.
* config/mips/t-vr4xxx (MULTILIB_MATCHES): Same.
for include/elf:
* mips.h (E_MIPS_MACH_4121): New.
for include/opcode:
* mips.h (INSN_4121): New.
for opcodes:
* mips-dis.c (set_mips_isa_type): Add bfd_mach_mips4121.
(_print_insn_mips): Same.
* mips-opc.c: Add vr4121.
for sim/mips:
* configure.in,mips.igen,vr.igen: Add vr4121.
* configure: Rebuilt.
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Set mips_fpu, and mips_fpu_bitsize.
Set sim_gen, and sim_igen_machine.
* configure: Rebuild.
* mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
* sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
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1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
* dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
(tx3904sio_tickle): fflush after a stdout character output.
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[ChangeLog.sky]
1998-12-08 Frank Ch. Eigler <fche@cygnus.com>
* sim-main.h (sim_state): Add multi-phase load tracking fields.
* sky-gdb.c (sky_option_handler): Add --load-next option handling.
* mips.igen (BREAK): Add multi-phase load and printf code handling.
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v850/simops.c, d10v/simops.c, v850/Makefile.in, d10v/Makefile.in:
Include targ-vals.h instead of syscall.h. Replace SYS_* with
TARGET_SYS_*. Add dependency.
z8k/support.c: Include <errno.h>
v850/simops.c: Replace long with portable signed32.
mips/interp.c: Make sim_monitor global - needed by sky.
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Update configure.in/configure.
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Remove last remenats of old gencode simulator.
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Fix problems: All vr.igen instructions are 64 bit.
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